Datasheet

MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
44 ______________________________________________________________________________________
Line Inputs
The MAX9880A include one pair of single-ended line
inputs. When enabled the line inputs connect directly to
the headphone amplifier and line outputs and can be
optionally connected to the ADC for recording.
Playback Volume
The MAX9880A incorporates volume and mute control to
allow level control for the playback audio path. Program
registers 0x1C and 0x1D to set the desired volume.
Line Output Level
The MAX9880A incorporates gain and mute control to
allow level control for the line outputs.
REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
(SEE NOTE)
Left-Line Input Level 0 LILM 0 0 LIGL 0x1A
Right-Line Input Level 0 LIRM 0 0 LIGR 0x1B
BITS FUNCTION
LILM/LIRM
Line Input Left/Right Playback Mute
0 = Line input is connected to the headphone amplifiers.
1 = Line input is disconnected from the headphone amplifiers.
Line Input Left/Right Gain
SETTING GAIN (dB) SETTING GAIN (dB)
0x0 +24 0x8 +8
0x1 +22 0x9 +6
0x2 +20 0xA +4
0x3 +18 0xB +2
0x4 +16 0xC 0
0x5 +14 0xD -2
0x6 +12 0xE -4
LIGL/LIGR
0x7 +10 0xF -6
Table 13. Line Input Registers
REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
(SEE NOTE)
Left Volume Control 0 VOLLM VOLL 0x1C
Right Volume Control 0 VOLRM VOLR 0x1D
BITS FUNCTION
VOLLM/
VOLRM
Left/Right Playback Mute. VOLLM and VOLRM mute both the DAC and line input audio signals.
0 = Audio playback is unmuted.
1 = Audio playback is muted.
Note: VSEN has no effect on the mute function. When VOLLM or VOLRM is set, the output is muted
immediately (ZDEN = 1) or at the next zero-crossing (ZDEN = 0).
Table 14. Playback Volume Registers
Grayed boxes = Not used.
Note: Register addresses listed are for I
2
C. To get the SPI address, add 0x200 with the following exception: Register 0xFF is not
accessible through SPI.
Grayed boxes = Not used.
Note: Register addresses listed are for I
2
C. To get the SPI address, add 0x200 with the following exception: Register 0xFF is not
accessible through SPI.