Datasheet

MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
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R14R15 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2
L1
L0
SDOUT
20ns
0ns (min)
0ns (min)
1/f
S
LRCLK
BCLK
20ns (min) 0ns (min)
75ns (min)
SDIN
TDM = 1, BCI = 1, HIZOFF = 0, SLOTDLY = 0, SLOT = 00, DLY = 0
40ns (max)
0ns (min)
30ns (min)
30ns (min) 7ns (typ)
VOICE (TDM/PCM) SLAVE MODES:
TDM = 1, BCI = 0, HIZOFF = 0, SLOTDLY = 0, SLOT = 00, DLY = 0
R14R15 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2
L1
L0
SDIN
R14R15 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2 L1 L0
SDOUT
20ns
0ns (min)
0ns (min)
1/f
S
LRCLK
BCLK
20ns (min) 0ns (min)
75ns (min)
SDIN
TDM = 1, BCI = 0, HIZOFF = 1, SLOTDLY = 0, SLOT = 00, DLY = 0
40ns (max)
0ns (min)
30ns (min)
30ns (min) 7ns (typ)
R14R15 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2
L1
L0
SDIN
R14R15 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2
L1
L0
SDOUT
20ns
0ns (min)
0ns (min)
1/f
S
LRCLK
BCLK
20ns (min) 0ns (min)
75ns (min)
SDIN
40ns (max)
0ns (min)
30ns (min)
30ns (min)
R14R15 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0
L15 L14 L13 L12 L11 L10 L9 L8 L7 L6 L5 L4 L3 L2
L1
L0
SDIN
Figure 4. Digital Audio Interface Voice Slave Mode
REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
(SEE NOTE)
DIGITAL MIXERS
DAC-L/R Mixer MIXDAL MIXDAR 0x10
Table 8. Digital Mixers
Note: Register addresses listed are for I
2
C. To get the SPI address, add 0x200 with the following exception: Register 0xFF is not
accessible through SPI.
BITS FUNCTION
Digital Mixers (MIXDAL/MIXDAR). Selects and mixes the audio source(s) for the DACs according to the
information below.
MIXDAL/MIXDAR SOURCE
1xxx DAI1 left-channel data
x1xx DAI1 right-channel data
xx1x DAI2 left-channel data
MIXDAL/
MIXDAR
xxx1 DAI2 right-channel data