Datasheet

MAX9880A
Low-Power, High-Performance
Dual I
2
S Stereo Audio Codec
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REGISTER B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
(SEE NOTE)
POR
STATE
R/W
DAI1 CLOCK CONTROL
Stereo Audio Clock Control High PLL1 NI1[14:8] 0x06 0x00 R/W
Stereo Audio Clock Control Low NI1[7:1] RLK1/NI1[0] 0x07 0x00 R/W
DAI1 CONFIGURATION
Interface Mode A MAS1 WCI1 BCI1 DLY1 HIZOFF1 TDM1 FSW1 0 0x08 0x00 R/W
Interface Mode B DL1 SEL1 SDOEN1 SDIEN1 DMONO1 BSEL1 0x09 0x00 R/W
Time-Division Multiplex SLOTL1 SLOTR1 SLOTDLY1[3:0] 0x0A 0x00 R/W
DAI2 CLOCK CONTROL
Stereo Audio Clock Control High PLL2 NI2[14:8] 0x0B 0x00 R/W
Stereo Audio Clock Control Low NI2[7:1] RLK2/NI2[0] 0x0C 0x00 R/W
DAI2 CONFIGURATION
Interface Mode A MAS2 WCI2 BCI2 DLY2 HIZOFF2 TDM2 FSW2 WS2 0x0 D 0x00 R /W
Interface Mode B DL2 SEL2 SDOEN2 SDIEN2 DHF BSEL2 0x0E 0x00 R/W
Time-Division Multiplex SLOTL2 SLOTR2 SLOTDLY2[3:0] 0x0F 0x00 R/W
DIGITAL MIXERS
DAC-L/R Mixer MIXDAL MIXDAR 0x10 0x00 R/W
DIGITAL FILTERING
Codec Filters MODE AVFLT DCB DVFLT 0x11 0x00 R/W
SPDM OUTPUTS
Configuration SPDMCLK SPDML SPDMR 0 0 0 0 0x12 0x00 R/W
Input MIXSPDML MIXSPDMR 0x13 0x00 R/W
REVISION ID
Rev ID location (replicated for
SPI mode)
REV 0x14 0x42 R/W
LEVEL CONTROL
Sidetone DSTS 0 DVST 0x15 0x00 R/W
Stereo DAC Level 0 SDACM 0 0 SDACA 0x16 0x00 R/W
Voice DAC Level 0 VDACM VDACG VDACA 0x17 0x00 R/W
Left ADC Level 0 0 AVLG AVL 0x18 0x00 R/W
Right ADC Level 0 0 AVRG AVR 0x19 0x00 R/W
Left-Line Input Level 0 LILM 0 0 LIGL 0x1A 0x00 R/W
Right-Line Input Level 0 LIRM 0 0 LIGR 0x1B 0x00 R/W
Left Volume Control 0 VOLLM VOLL 0x1C 0x00 R/W
Right Volume Control 0 VOLRM VOLR 0x1D 0x00 R/W
Left-Line Output Level 0 LOLM 0 0 LOGL 0x1E 0x00 R/W
Right-Line Output Level 0 LORM 0 0 LOGR 0x1F 0x00 R/W
Left Microphone Gain 0 PALEN PGAML 0x20 0x00 R/W
Right Microphone Gain 0 PAREN PGAMR 0x21 0x00 R/W
CONFIGURATION
Input MX INL MX IN R AUXCAP AUXGAIN AUXCAL AUXEN 0 x22 0x 0 0 R/W
Microphone MICCLK DIGMICL DIGMICR 0 0 0 MBIAS 0x23 0x00 R/W
Mode DSLEW VSEN ZDEN 0 0 HPMODE 0x24 0x00 R/W
Jack Detect JDETEN 0 JDWK 0 0 0 JDEB 0x25 0x00 R/W
Table 1. Register Map (continued)