Datasheet

MAX9867
Ultra-Low Power Stereo Audio Codec
10 ______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= V
PVDD
= V
DVDD
= V
DVDDIO
= +1.8V, R
L
= ∞, headphone load (R
L
) connected between _OUTP and _OUTN in differential
mode, C
REF
= 2.2µF, C
MICBIAS
= C
PREG
= C
REG
= 1µF, AV
PRE
= +20dB, AV
PGAM
= 0dB, AV
DAC
= 0dB, AV
LINE
= +20dB, AV
VOL
=
0dB, MCLK = 13MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL SIDETONE
Sidetone Gain Adjust Range AV
STGA
Differential output mode,
DVST = 0x1F to 0x01
-60 0 dB
Voice Path Phase Delay P
DLY
MIC input to headphone output, f = 1kHz,
HP filter disabled, f
S
= 8kHz
2.2 ms
INPUT CLOCK CHARACTERISTICS
MCLK Input Frequency f
MCLK
For any LRCLK sample rate 10 60 MHz
Prescaler = /1 mode 40 60
MCLK Input Duty Cycle
/2 or /4 modes 30 70
%
Maximum MCLK Input Jitter
Maximum allowable RMS for performance
limits
100 ps
RMS
LRCLK Sample Rate Range 8 48 kHz
Rapid lock mode 2 7
LRCLK PLL Lock Time
Any allowable LRCLK
and PCLK rate, slave
mode
Nonrapid lock
mode
12 25
ms
LRCLK Acceptable Jitter for
Maintaining PLL Lock
Allowable LRCLK period change from
nominal for slave PLL mode at any
allowable LRCLK and PCLK rates
±100 ns
FREQ = 0x8 through 0xF 0 0 %
PCLK = 192xf
S
, 256xf
S
, 384xf
S
, 512xf
S
,
768xf
S
, and 1024xf
S
00
LRCLK Average Frequency Error
(Master and Slave Modes)
(Note 9)
All other modes -0.025 +0.025
DIGITAL INPUT (MCLK)
Input High Voltage V
IH
1.2 V
Input Low Voltage V
IL
0.6 V
Input Leakage Current I
IH
, I
IL
T
A
= +25°C ±1 µA
Input Capacitance 10 pF
DIGITAL INPUTS (SDIN, BCLK, LRCLK)
Input High Voltage V
IH
0.7 x
DVDDIO
V
Input Low Voltage V
IL
0.3 x
DVDDIO
V
Input Hysteresis 200 mV
Input Leakage Current I
IH
, I
IL
T
A
= +25°C ±1 µA
Input Capacitance 10 pF