Datasheet

MAX9850
Headphone Overcurrent Interrupt Enable (IIOH)
1 = ALERT sets to 1 when either IOHL or IOHR set to 1.
0 = ALERT will not set when IOHL or IOHR set to 1.
IIOH = 1 configures the MAX9850 to set ALERT = 1
when one or both of the headphone amplifier outputs
(HPL, HPR) has experienced an overcurrent condition.
Program GM(1:0), while GPD = 1, to configure GPIO as
a hardware interrupt to alert a µC to an overcurrent con-
dition on the headphone outputs.
Enable Register
Shutdown ( SHDN )
1 = The MAX9850 is powered on.
0 = The MAX9850 is in low-power shutdown mode. The
I
2
C interface remains active.
Set SHDN = 1 to power on the MAX9850. The head-
phone amplifier, master clock, line inputs/outputs, DAC,
charge pump, and charge-pump clock all have their
own enable bits. The individual components of the
MAX9850 can only be enabled after SHDN = 1.
MCLK Enable (MCLKEN)
1 = MCLK is connected to the MAX9850.
0 = MCLK is disconnected from the MAX9850.
MCLKEN must be set to 1 for the DAC to operate prop-
erly. The line inputs/outputs and headphone amplifiers
will work if MCLKEN = 0, but the charge-pump clock
must be derived from the internal oscillator.
Charge-Pump Enable (CPEN(1:0))
11 = Enable the internal charge pump.
00 = Disable the internal charge pump.
10 and 01 = Invalid.
Set CPEN(1:0) to 11 to enable the internal charge
pump when the line outputs and headphone amplifiers
are used.
Headphone Output Enable (HPEN)
1 = Enable the headphone outputs.
0 = Disable the headphone outputs.
Set HPEN = 1 to enable the headphone outputs. HPEN
= 0 places the headphone outputs in high impedance.
The line outputs must be enabled for the headphone
amplifiers to operate properly.
Line Output Enable (LNOEN)
1 = Enable the line outputs.
0 = Disable the line outputs.
LNOEN = 0 forces the line outputs and the headphone
outputs to high impedance. Set LNOEN = 1 to enable
the line outputs. The line outputs must be enabled for
the headphone amplifiers to operate properly.
Line Input Enable (LNIEN)
1 = Enable the line inputs.
0 = Disable the line inputs.
LNIEN = 1 enables the line inputs. LNIEN = 0 discon-
nects the line inputs.
DAC Enable (DACEN)
1 = Enable the audio DAC.
0 = Disable the audio DAC.
DACEN = 1 enables the DAC and all supporting circuit-
ry including the digital audio interface and interpolating
FIR filter. DACEN = 0 places the DAC and support cir-
cuitry into low-power shutdown mode.
Clock Register
Internal Clock Divide (IC(1:0))
00 = Internal clock divider is transparent (f
ICLK
=
f
MCLK
).
01 = (f
ICLK
= f
MCLK
/ 2).
10 = (f
ICLK
= f
MCLK
/ 3).
11 = (f
ICLK
= f
MCLK
/ 4).
IC(1:0) controls the internal clock divider that determines
the internal clock frequency from the master clock.
Charge-Pump Register
Stereo Audio DAC with DirectDrive
Headphone Amplifier
26 ______________________________________________________________________________________
Table 16. Enable (0x5) Read/Write, Bit
Descriptions
B7
B6
B5
B4
B3
B2
B1
B0
SHDN
MCLKEN CPEN (1:0) HPEN LNOEN LNIEN
DACEN
Table 17. Clock (0x6) Read/Write, Bit
Descriptions
B7
B6 B5 B4 B3 B2 B1
B0
0000 IC(1:0) 0 0
Table 18. Charge Pump (0x7) Read/Write,
Bit Descriptions
B7
B6 B5 B4 B3 B2 B1
B0
SR(1:0) 0 CP(4:0)