Datasheet

For example:
f
MCLK
= 12MHz, SF = 1, and f
CP
= 666.7kHz,
N
CP(4:0)
= 9.
Table 8 shows recommended CP(4:0) values for typical
MCLK frequencies.
Registers and Bit Descriptions
Eleven internal registers program and report the status
of the MAX9850. Table 9 lists all of the registers, their
addresses, and power-on-reset state. Registers 0x0
and 0x1 are read-only while all of the other registers are
read/write. Register 0xB is reserved for factory testing.
MAX9850
Stereo Audio DAC with DirectDrive
Headphone Amplifier
______________________________________________________________________________________ 21
Table 9. Register Map
REGISTER
B7 B6 B5 B4 B3 B2 B1 B0
REGISTER
ADDRESS
POWER-ON
RESET STATE
Status A
ALERT SGPIO
LCK
SHPS VMN
1
IOHL IOHR
0x0 —
Status B X X X
SMONO
SHP SLO SLI
SDAC
0x1 —
Volume
MUTE SLEW
VOL(5:0) 0x2 0x0C
General
Purpose
GM(1:0)
GPD
DBDEL(1:0)
MONO
0
ZDEN
0x3 0x00
Interrupt
Enable
0
ISGPIO ILCK ISHPS IVMN
0 0 IIOH 0x4 0x00
Enable
SHDN MCLKEN
CPEN(1:0)
HPEN LNOEN LNIEN DACEN
0x5 0x00
Clock 0000 IC(1:0) 0 0 0x6 0x00
Charge
Pump
SR(1:0) 0 CP(4:0) 0x7 0x00
LRCLK MSB
INT MSB(14:8) 0x8 0x00
LRCLK LSB
LSB(7:0) 0x9 0x00
Digital
Audio
MAS
INV
BCINV
LSF DLY RTJ WS(1:0) 0xA 0x00
RESERVED 0xB —
X = Don’t Care.
Table 8. Recommended CP(4:0) Values
for Typical MCLK Frequencies
f
MCLK
(MHz)
CP(4:0)
IC(1:0) SF
f
CP
(kHz)
11.2896
0x08 0x0 1 705.6
12.0000
0x09 0x0 1 666.7
12.2880
0x09 0x0 1 682.7
13.0000
0x0A 0x0 1 650.0
24.0000
0x09 0x1 2 666.7
27.0000
0x07 0x2 3 642.9