Datasheet

MAX9850
control pin of a 3-wire headphone jack as shown in
Figure 2. With no headphone present, the output
impedance of the headphone amplifier pulls HPS to
less than 0.3 x DV
DD
. When a headphone is inserted
into the jack, the control pin is disconnected from the
tip contact and HPS is pulled to DV
DD
through the inter-
nal 100kΩ pullup. No external resistor is required.
Leave HPS floating if automatic headphone sensing is
not used. HPS must be high and HPEN (register 0x5,
bit B3) must be set to 1 for the headphone amplifiers
(HPR and HPL) to output an audio signal.
The MAX9850 includes an HPS debounce circuit that
ignores short duration changes on HPS. The debounce
circuit ensures that a headphone is properly connected
before powering up and enabling the headphone
amplifiers. Program DBDEL(1:0) in the general-purpose
register (register 0x3, bits B4 and B3) to set the HPS
debounce delay time. The delay time is based on a
division of the charge-pump frequency, f
CP
. See the
Charge Pump section for details on programming the
charge-pump frequency. Table 2 lists the available
delay times of the debounce circuit.
There is no delay on removal of a headphone when
using automatic headphone sense. The headphone
amplifiers are immediately placed into shutdown when
HPS goes high.
SHPS in the status A register (register 0x0, bit B4)
reports the status of HPS. SHPS = 0 when HPS is low
and SHPS = 1 when HPS is high.
GPIO
Configure GPIO as an input or an output with the GPD
bit in the general-purpose register (register 0x3, bit B5).
GPD = 1 configures GPIO as an open-drain output
while GPD = 0 makes GPIO an input. Connect an exter-
nal pullup resistor from GPIO to DV
DD
when GPIO is
configured as an output.
GPIO as an output allows the MAX9850 to drive an LED
or other state indicator. It also can be used to provide
an interrupt signal to alert a µC when an event has
occurred. Potential events include changes in internal
PLL lock state, connecting headphones to HPS, head-
phone outputs reaching the minimum volume, or an
overcurrent on the headphone outputs. Any of these
events can be programmed to pulse GPIO’s output
state when GPIO is configured as an open-drain output.
Using GPIO as an input allows the MAX9850 to receive a
signal from a µC’s digital I/O or other device. The status
of GPIO is read through SGPIO in the status A register
(register 0x0, bit B6).
GPIO as an Output
Set GPD = 1 (register 0x3, bit B5) to configure GPIO as
an output. Program the output operating mode of GPIO
with GM(1:0) in the general-purpose register (register
0x3, bits B7 and B6). GPIO can be programmed to out-
put logic-high, a logic-low, or it can be programmed to
output an interrupt signal by changing state when the
ALERT bit in the status A register (register 0x0, bit B7)
sets. Table 3 lists GPIO’s modes of operation.
Stereo Audio DAC with DirectDrive
Headphone Amplifier
16 ______________________________________________________________________________________
DV
DD
100k
Ω
SHDN*
HPS
MAX9850
*SHDN = 1 FOR THIS DIAGRAM
Figure 2. Headphone Sense (HPS) Input
Table 2. HPS Debounce Times
DBDEL(0)
DBDEL(0)
DEBOUNCE
TIME
(ms)
DEBOUNCE TIME
BASED ON
f
CP
= 667kHz (ms)
0 0 0 0 (Disabled)
01
2
17
x 1 / f
CP
Approx 200
10
2
18
x 1 / f
CP
Approx 400
11
2
19
x 1 / f
CP
Approx 800
Table 3. GPIO Output Operating Modes
(GPD = 1)
GM(1)
GM(0)
MODE DESCRIPTION
0 0 GPIO = 0
0 1 GPIO = High impedance
1 0 GPIO = 0, ALERT output pulse enabled
11
GPIO = High impedance, ALERT output pulse
enabled