Datasheet
Stereo, High-Power, Class D Amplifiers
MAX98400A/MAX98400B
17
Limiter Threshold Control (LIM_TH)
There are three modes for the limiter, defined by V
LIM_TH
,
the voltage applied to the LIM_TH pin (Table 1).
In Mode1, the limiter is disabled. The output clips when
output peak voltage reaches the voltage on PVDD, V
PVDD
.
In Mode2, the limiter threshold (V
THRESH
) tracks supply
voltage, V
PVDD
. The peak output voltage is limited to
approximately V
THRESH
= V
PVDD
x 0.95.
In Mode3, the limiter threshold, V
THRESH
, is program-
mable. V
LIM_TH
can be set to a voltage proportional to
the desired output threshold. The limiter threshold can
be set down to 0.5 x V
PVDD
and up to 1.6 x V
PVDD
.
V
THRESH
cannot exceed 22V.
Threshold settings below V
PVDD
can be used to protect
speakers; the peak output voltage is limited to a value of
V
THRESH
= V
LIM_TH
x 6.4.
Threshold settings above V
PVDD
can be used to limit the
output distortion; the peak output voltage is limited to a
value of V
THRESH
= V
LIM_TH
x 6.4 x 0.95. The 0.95 fac-
tor takes into account the voltage drop across the power
FET that occurs when the amplifier is clipped. Choose
R
LIM1
and R
LIM2
(Figure 3) to set the desired voltage at
the LIM_TH pin. For best accuracy, the parallel combina-
tion R
LIM1
||R
LIM2
should be approximately 100kI.
Example:
If the speaker in the application can handle only
12V peak, but V
PVDD
is higher, the threshold voltage
(V
THRESH
) should be set to 12V:
V
THRESH
= 12V
The voltage that needs to be applied to V
LIM_TH
is then
defined as:
V
LIM_TH
= V
THRESH
/6.4 = 12V/6.4 = 1.88V
For a 5V supply, a resistor-divider of R
LIM1
= 165kI/
R
LIM2
= 270kI gives both an unloaded voltage of 1.82V
and the desired output resistance of approximately
100kI.
If only distortion limiting is desired, set V
THRESH
to be
20% higher than V
PVDD
. This limits the output clipping
levels to approximately 10% THD.
The attack time for the limiter is fixed, typically < 200Fs.
Release Time Control (RELEASE)
The release time for the limiter is set by an external
capacitor at RELEASE (C
REL
) to GND. Choose C
REL
=
Release Time [s] x 1FF. The C
REL
limit is 2.2FF.
Table 1. Limiter Control Modes
Note: V
THRESH
is the output peak limiting voltage (limiter threshold voltage).
Figure 3. Limiter Control, Mode3 Configuration (Table 1)
MODE NAME FUNCTION
LIM_TH VOLTAGE
RANGE
Mode1 Disable
The limiter is disabled when connecting LIM_TH to V
S
or a voltage greater
than 3.9V.
3.9V < V
LIM_TH
P V
S
Mode2 PVDD tracking
The output peak voltage is limited to just below the supply voltage,
V
PVDD
. V
THRESH
= V
PVDD
x 0.95 when LIM_TH is connected to ground or
a voltage below 0.3V.
V
GND
P V
LIM_TH
<
0.15V
Mode3 Programmable
The output peak voltage, V
THRESH
, is limited to the threshold set by the
voltage applied on the LIM_TH so that V
THRESH
= V
LIM_TH
x 6.4.
When V
THRESH
is set 20% higher than V
PVDD
, the output THD distortion is
limited to 10%.
0.6V P V
LIM_TH
P 3.8V
MAX98400A
MAX98400B
V
S
REGULATOR
LIMITER
CONTROL
R
LIM2
R
LIM1
LIM_TH RELEASE
V
S
PVDD
PVDD
18V
C1
1.0
µF
C2
1.0
µF
C
REL
1.0µF
PVDD