Datasheet

Maxim Integrated │ 92
MAX98090 Ultra-Low Power Stereo Audio Codec
www.maximintegrated.com
Table 18. Recommended Compensation Filter Settings for f
PCLK
= 13MHz
Table 19. Recommended Compensation Filter Settings for f
PCLK
= 19.2MHz
Table 20. Recommended Compensation Filter Settings for f
PCLK
= 256 x f
S
Table 17. Recommended Compensation Filter Settings for f
PCLK
= 12.288MHz
f
PCLK
= f
MCLK
/PSCLK (See Table 34) RECOMMENDED DMIC_COMP SETTING BY SAMPLE RATE (kHz)
MICCLK DIVIDER f
DMC
(MHz) DMIC_FREQ 8 16 32 44.1 48
0 f
PCLK
/2 6.5 2 7 8 1 1 1
1 f
PCLK
/3 4.333 1 7 8 0 0 1
2 f
PCLK
/4 3.25 0 7 8 1 1 1
3 f
PCLK
/5 2.6 0 7 8 4 4 5
4 f
PCLK
/6 2.167 0 7 8 1 1 1
5 f
PCLK
/8 1.625 0 7 8 1 1 1
f
PCLK
= f
MCLK
/PSCLK (See Table 34) RECOMMENDED DMIC_COMP SETTING BY SAMPLE RATE (kHz)
MICCLK DIVIDER f
DMC
(MHz) DMIC_FREQ 8 16 32 44.1 48
0 f
PCLK
/2 — — — — — — —
1 f
PCLK
/3 6.4 2 7 8 1 1 1
2 f
PCLK
/4 4.8 2 7 8 5 5 6
3 f
PCLK
/5 3.84 1 7 8 2 2 3
4 f
PCLK
/6 3.2 0 7 8 1 1 2
5 f
PCLK
/8 2.4 0 7 8 5 5 6
f
PCLK
= f
MCLK
/PSCLK (See Table 34) RECOMMENDED DMIC_COMP SETTING BY SAMPLE RATE (kHz)
MICCLK DIVIDER f
DMC
(MHz) DMIC_FREQ 8 16 32 44.1 48
0 f
PCLK
/2 — — 7 8 3 3 3
1 f
PCLK
/3 — — 7 8 2 2 2
2 f
PCLK
/4 — — 7 8 3 3 3
3 f
PCLK
/5 — — 7 8 6 6 6
4 f
PCLK
/6 — — 7 8 3 3 3
5 f
PCLK
/8 — — 7 8 3 3 3
f
PCLK
= f
MCLK
/PSCLK (See Table 34) RECOMMENDED DMIC_COMP SETTING BY SAMPLE RATE (kHz)
MICCLK DIVIDER f
DMC
(MHz) DMIC_FREQ 8 16 32 44.1 48
0 f
PCLK
/2 6.144 2 7 8 3 3 3
1 f
PCLK
/3 4.096 1 7 8 2 2 2
2 f
PCLK
/4 3.072 0 7 8 3 3 3
3 f
PCLK
/5 2.4576 0 7 8 6 6 6
4 f
PCLK
/6 2.048 0 7 8 3 3 3
5 f
PCLK
/8 1.536 0 7 8 3 3 3