Datasheet

Maxim Integrated │ 83
MAX98090 Ultra-Low Power Stereo Audio Codec
www.maximintegrated.com
Table 7. Input Enable Register
Table 7 details the available input signal path enables
(with the exception of the analog microphone inputs
1/2, which are enabled from registers 0x10 and 0x11, or
Tables 9 and 10, respectively). Table 8 details the avail-
able output signal path enables.
When the device is in global shutdown, the major input
and output blocks are all disabled to conserve power.
However, the I
2
C interface remains active and all device
registers can be configured. Certain registers should be
programmed while in shutdown only (detailed in Table
90). Changing these registers when the device is active
could result in unexpected behavior. For optimal mini-
mized power consumption, only enable the stage blocks
that are part of the intended signal path configuration.
ADDRESS: 0x3E
DESCRIPTION
BIT NAME TYPE POR
7 — — — —
6 — — — —
5 — — — —
4 MBEN R/W 0
Microphone Bias Enable
0: Microphone bias disabled.
1: Microphone bias enabled.
3 LINEAEN R/W 0
Enables Line A Analog Input Block
0: Line A input amplier disabled.
1: Line A input amplier enabled.
2 LINEBEN R/W 0
Enables Line B Analog Input Block
0: Line B input amplier disabled.
1: Line B input amplier enabled.
1 ADREN R/W 0
Right ADC Enable
0: Right ADC disabled.
1: Right ADC enabled.
0 ADLEN R/W 0
Left ADC Enable
0: Left ADC disabled.
1: Left ADC enabled.