Datasheet

Maxim Integrated │ 26
MAX98090 Ultra-Low Power Stereo Audio Codec
www.maximintegrated.com
Input Clock Characteristics
(V
AVDD
= V
HPVDD
= V
DVDDIO
= 1.8V, V
DVDD
= 1.2V, V
SPKLVDD
= V
SPKRVDD
= V
SPKVDD
= 3.7V. Receiver load (R
RCV
) connected
between RCVP/LOUTL and RCVN/LOUTR (LINMOD = 0). Line output loads (R
LOUT
) connected between from RCVP/LOUTL and
RCVN/LOUTR to GND (LINMOD = 1). Headphone loads (R
HP
) connected from HPL or HPR to GND. Speaker loads (Z
SPK
) connected
between SPK_P and SPK_N. R
RCV
= J, R
LOUT
= J, R
HP
= J, Z
SPK
= J. C
REF
= 2.2µF, C
BIAS
= C
MICBIAS
= 1µF, C
C1N-C1P
=
C
CPVDD
= C
CPVSS
= 1µF. A
V_MICPRE_
= A
V_MICPGA_
= A
V_LINEPGA_
= 0dB, A
V_ADCLVL
= A
V_ADCGAIN
= 0dB, A
V_DACLVL
=
A
V_DACGAIN
= 0dB, A
V_MIXGAIN
= 0dB, AV_RCV = A
V_LOUT
= A
V_HP
= A
V_SPK
= 0dB. f
MCLK
= 12.288MHz, f
LRCLK
= 48kHz, MAS
= 0, 20-bit source data. T
A
= T
MIN
to T
MAX
unless otherwise noted. Typical values are at T
A
= +25°C.) (Notes 2, 10)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
INPUT CLOCK CHARACTERISTICS
MCLK Input Frequency f
MCLK
f
S
= 8kHz, voice mode lters
(MODE = 0)
2.048 60
MHz
f
S
= 48kHz, music mode lters
(MODE = 1)
10 60
f
S
= 96kHz, music mode lters
(MODE = 1)
12.288 60
MCLK Input Duty Cycle
PSCLK = 01 40 50 60
%
PSCLK = 10 or 11 30 70
Maximum MCLK Input Jitter 1 ns
LRCLK Sample Rate (Note 12) f
LRCLK
DHF = 0 8 48
kHz
DHF = 1 48 96
DAI LRCLK Average Frequency
Error (Note 13)
FREQ = 0x8 to 0xF 0 0
%
FREQ = 0x0 -0.025 +0.025
Minimum PCLK to LRCLK
Frequency Ratio
8kHz ≤ f
S
≤ 48kHz,
voice mode lters
(MODE = 0), DHF = 0
OSR = 128
or 64
256 x f
S
f
PCLK
8kHz ≤ f
S
≤ 48kHz,
music mode lters
(MODE = 1), DHF = 0
OSR = 128 256 x f
S
OSR = 64 208 x f
S
48kHz < f
S
≤ 96kHz,
music mode lters
(MODE = 1), DHF = 1
OSR = 64 128 x f
S
PLL Lock Time 2 7 ms
Maximum LRCLK Input Jitter
to Maintain PLL Lock
±100 ns
Soft-Start/Stop Time 10 ms