Datasheet

MAX9736
Mono/Stereo High-Power Class D Amplifier
20 ______________________________________________________________________________________
Chip Information
PROCESS: BiCMOS
Pin Configuration
MAX9736
TQFN
TOP VIEW
29
30
28
27
12
11
13
OUTL-
MONO
FBL
INL
N.C.
14
OUTL-
OUTR- C1N MOD OUTR- FBR INR
12
PGND
4567
2324 22 20 19 18
PGND
PVDD
AGND
AGND
COM
REGEN
BOOT
C1P
3
21
31
10
OUTL+
SHDN
32
9
OUTL+
MUTE
EP*
+
EP* = EXPOSED PAD, CONNECT TO PGND.
PVDD
26
15
REG
OUTR+
25
16
VS
N.C.
N.C.
8
17
OUTR+
Ordering Information (continued)
PART
STEREO/MONO
OUTPUT POWER
PIN-PACKAGE
MAX9736AETJ/V+
2 x 15W/
1 x 30W
32 TQFN-EP*
7mm x 7mm
MAX9736BETJ+
2 x 6W/
1 x 12W
32 TQFN-EP*
7mm x 7mm
MAX9736BETJ/V+
2 x 6W/
1 x 12W
32 TQFN-EP*
7mm x 7mm
MAX9736DETJ+
2 x 6W/
1 x 12W
32 TQFN-EP*
5mm x 5mm
MAX9736DETJ/V+
2 x 6W/
1 x 12W
32 TQFN-EP*
5mm x 5mm
Note: All devices are specified over the -40°C to +85°C oper-
ating temperature range.
+ Denotes a lead(Pb)-free/RoHS-compliant package.
* EP = Exposed pad.
/V denotes an automotive qualified part.