Datasheet
MAX9325
2:8 Differential LVPECL/LVECL/HSTL Clock and
Data Driver
_______________________________________________________________________________________ 5
AC ELECTRICAL CHARACTERISTICS—QFN Package
((V
CC
- V
EE
) = 2.375V to 3.8V, R
L
= 50Ω ±1% to V
CC
- 2V, f
IN
≤ 500MHz, input transition time = 125ps (20% to 80%). Typical values
are at (V
CC
- V
EE
) = 3.3V, V
IH
= (V
CC
- 1V), V
IL
= (V
CC
- 1.5V).) (Note 7)
-40°C +25°C +85°C
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
Differential
Input-to-Output
Delay
t
PLHD
t
PHLD
Figure 2
250 575 298 553 309 576
ps
Single-Ended
Input-to-Output
Delay
t
PLH
t
PHL
Figure 3 (Note 8) 253 581 310 586 324 606
ps
Output-to-
Output Skew
t
SKOO
(Note 9)
50 50
50 ps
Part-to-Part
Skew
t
SKPP
Differential input
(Note 10)
192 215 218
ps
Added Random
Jitter
t
RJ
f
IN
= 0.5GHz
clock pattern
(Note 11)
1.5 1.5 1.5
ps
RMS
Added
Deterministic
Jitter
t
DJ
f
IN
= 1.0Gbps,
2E
23
- 1 PRBS
pattern (Note 11)
95 95
95
ps
P-P
Switching
Frequency
f
MAX
V
OH
- V
OL
≥
300mV clock
pattern
1.5 1.5 1.5
GHz
Output Rise/Fall
Time (20% to
80%)
t
R
, t
F
Figure 2
97 411 104 210 111 232
ps
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters production tested at T
A
= +25°C and guaranteed by design over the full operating temperature range.
Note 4: Single-ended input operation using V
BB
is limited to (V
CC
- V
EE
) = 3.0V to 3.8V.
Note 5: Use V
BB
only for inputs that are on the same device as the V
BB
reference.
Note 6: All pins open except V
CC
and V
EE
.
Note 7: Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 8: Measured from the 50% point of the input signal with the 50% point equal to V
BB
, to the 50% point of the output signal.
Note 9: Measured between outputs of the same part at the signal crossing points for a same-edge transition. Differential input signal.
Note 10: Measured between outputs of different parts under identical condition for same-edge transition.
Note 11: Device jitter added to the input signal. Differential input signal.










