Datasheet

24 Maxim Integrated
Gigabit Multimedia Serial Link with Spread
Spectrum and Full-Duplex Control Channel
MAX9259/MAX9260
Figure 16. MAX9260 Clock Output High-and-Low Times
Figure 17. MAX9260 Output Rise-and-Fall Times
Figure 18. MAX9260 Deserializer Delay
V
OL MAX
t
HIGH
t
LOW
t
T
V
OH MIN
PCLKOUT
0.8 x V
I0VCC
0.2 x V
I0VCC
t
F
t
R
C
L
SINGLE-ENDED OUTPUT LOAD
MAX9260
FIRST BIT
IN+/-
DOUT_
PCLKOUT
LAST BIT
SERIAL WORD N
SERIAL-WORD LENGTH
SERIAL WORD N+1 SERIAL WORD N+2
t
SD
PARALLEL WORD N-2
PARALLEL WORD N-1 PARALLEL WORD N
NOTE: PCLKOUT PROGRAMMED FOR RISING LATCHING EDGE.