Datasheet

�� Maxim Integrated Products 48

MAX9257A/MAX9258A

Fully Programmable Serializer/Deserializer

with UART/I

C Control Channel

MAX9258A Register Table (continued)

ADDRESS BITS DEFAULT NAME DESCRIPTION

Control channel end timeout: (ETO) times out if ECU does not use control channel for this amount of time after it

has already used at least once.

7:4 1010 ETODIV

Control channel end timeout divider

Pixel clock is first divided by:

0000 = 16 1000 = 256

0001 = 16 1001 = 512

0010 = 16 1010 = 1024 (default)

0011 = 16 1011 = 2048

0100 = 16 1100 = 4096

0101 = 32 1101 = 8192

0110 = 64 1110 = 16,384

0111 = 128 1111 = 32,768

3:0 0000 ETOCNT

Control channel end timeout counter

Divided pixel clock is used to count up to (ETOCNT + 1)

7 0 VEDGE

VSYNC active edge at ECU interface

0 = falling (default), 1 = rising

6 0 HEDGE

HSYNC active edge at ECU interface

0 = falling (default), 1 = rising

5 1 CKEDGE

PCLK active edge at ECU interface

0 = falling, 1 = rising (default)

4 0 Reserved (set to 0)

3 0 ACTLP

0 = stretcher output pulse is short

1 = stretcher output pulse is long

2:1 00 Reserved (set to 00)

0 0 PRBSEN

PRBS test enable

0 = disabled (default), 1 = enabled

7:1 1111100 DEVICEID 7-bit address of MAX9258A

0 0 Reserved (set to 0)

7:1 1111111 EF End frame to close control channel

0 1 Reserved (set to 1)