Datasheet

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MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I
2
C Control Channel
Table 2. MAX9258A Power-Up Default Register Map (see the MAX9258A Register Table)
REGISTER NAME
REGISTER
ADDRESS (hex)
POWER-UP VALUE
(hex)
POWER-UP DEFAULT SETTINGS
REG0 0x00 0xB5
PRATE = 10, 20MHz to 40MHz
SRATE = 11, 400Mbps to 840Mbps
PAREN = 0, parity disabled
PWIDTH = 101, parallel data width = 18
REG1 0x01 0x00
SPREAD = 00, spread spectrum = off
AER = 0, error count is reset by reading error registers
ACTOFFSET = 00, 23mV offset
Reserved = 000
REG2 0x02 0xA0
STODIV = 1010, STO clock is pixel clock divided by 1024
STOCNT = 0000, STO counter counts to 1
REG3 0x03 0xA0
ETODIV = 1010, ETO clock is pixel clock divided by 1024
ETOCNT = 0000, ETO counter counts to 1
REG4 0x04 0x20
VEDGE = 0, VSYNC active edge is falling
HEDGE = 0, HSYNC active edge is falling
CKEDGE = 1, pixel clock active edge is rising
Reserved = 0
ACTLP = 0, short stretcher output pulse
Reserved = 00
PRBSEN = 0, PRBS test disabled
REG5 0x05 0xF8 MAX9258 address = 1111 1000
REG6 0x06 0xFF End frame = 1111 1111
REG7 0x07 0x00
INTMODE = 0, interface with peripheral is UART
INTEN = 0, interface with peripheral is disabled
FAST = 0, UART bit rate = DC to 4.25Mbps
CTO = 000, never come back
BITRATE = 00, base mode bit rate = 95kbps to 400kbps
REG8 0x08 0x10
PATHRLO = 0001 0000
parity threshold = 16
REG9 0x09 0x00
PATHRHI = 0000 0000,
parity threshold = 16
REG10 0x0A 0x00 Parity errors video (8 LSBs) = read only
REG11 0x0B 0x00 Parity errors video (8 MSBs) = read only
REG12 0x0C 0x00 PRBS bit errors = read only
REG13 0x0D 0x00
Reserved = 000
Parity error, communication with MAX9258A = read only
Frame error, communication with MAX9258A = read only
Parity error, communication with MAX9257A = read only
Frame error, communication with MAX9257A = read only
I
2
C error, communication with peripheral = read only