Datasheet

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MAX9257A/MAX9258A
Fully Programmable Serializer/Deserializer
with UART/I
2
C Control Channel
Figure 10. MAX9258A Clock Output High and Low Time
Figure 11. MAX9258A Output Data Valid Times
Figure 12. MAX9258A Power-Up Delay Figure 13. MAX9258A Power-Down Delay
PCLK_OUT
t
DVB
t
DVA
V
OHMIN
V
OLMAX
V
OHMIN
V
OLMAX
NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE.
DOUT, VSYNC_OUT,
HSYNC_OUT, LOCK
V
OLMAX
t
HIGH
t
LOW
t
T
V
OHMIN
PCLK_OUT
PD
POWERED DOWN
t
PUD
POWERED UP
(OUTPUTS ACTIVE)
V
IHMIN
PD
HIGH IMPEDANCE
DOUT,
VSYNC,
HSYNC
POWERED DOWNPOWERED UP
t
PDD
V
ILMAX