Datasheet

27-Bit, 2.5MHz to 42MHz
DC-Balanced LVDS Deserializers
Maxim Integrated 11
MAX9248/MAX9250
OUTEN
ACTIVEHIGH IMPEDANCE
DE_OUT
RGB_OUT[17:0]
CNTL_OUT[8:0]
t
OE
0.8V
MAX9250
Figure 9. Output Enable Time
OUTEN
HIGH IMPEDANCEACTIVE
DE_OUT
RGB_OUT[17:0]
CNTL_OUT[8:0]
t
OZ
2.0V
MAX9250
Figure 10. Output Disable Time
FREQUENCY
TIME
f
RxCLKOUT
(MAX)
f
RxCLKIN
f
RxCLKOUT
(MIN)
1 / f
SSM
Figure 11. Simplified Modulation Profile