Datasheet

MAX9247
27-Bit, 2.5MHz-to-42MHz
DC-Balanced LVDS Serializer
12 ______________________________________________________________________________________
MAX9247
PAR-TO-SER
TIMING AND
CONTROL
DC BALANCE/
ENCODE
INPUT LATCH
RGB_IN
CNTL_IN
DE_IN
PCLK_IN
RNG0
RNG1
PWRDWN
1
0
130Ω
V
CC
130Ω
IN
OUT
82Ω 82Ω
CMF
PRE
RNG1
RNG0
MAX9250
SER-TO-PAR
TIMING AND
CONTROL
PLL
DC BALANCE/
DECODE
1
0
OUTEN
RGB_OUT
LOCK
PWRDWN
REF_IN
PCLK_OUT
DE_OUT
CNTL_OUT
R/F
CERAMIC RF SURFACE-MOUNT CAPACITOR
100Ω DIFFERENTIAL STP CABLE
PLL
*
*
*CAPACITORS CAN BE AT EITHER END.
Figure 10. AC-Coupled MAX9247 Serializer and MAX9250 Deserializer with Two Capacitors per Link
MAX9247
PAR-TO-SER
TIMING AND
CONTROL
DC BALANCE/
ENCODE
INPUT LATCH
RGB_IN
CNTL_IN
DE_IN
PCLK_IN
RNG0
RNG1
PWRDWN
1
0
130Ω
V
CC
130Ω
IN
OUT
82Ω 82Ω
RNG1
RNG0
MAX9250
SER-TO-PAR
TIMING AND
CONTROL
PLL
DC BALANCE/
DECODE
1
0
OUTEN
RGB_OUT
LOCK
PWRDWN
REF_IN
PCLK_OUT
DE_OUT
CNTL_OUT
CERAMIC RF SURFACE-MOUNT CAPACITOR
100Ω DIFFERENTIAL STP CABLE
PLL
CMF
PRE
R/F
Figure 11. AC-Coupled MAX9247 Serializer and MAX9250 Deserializer with Four Capacitors per Link