Datasheet

MAX9242/MAX9244/MAX9246/MAX9254
21-Bit Deserializers with Programmable
Spread Spectrum and DC Balance
12 ______________________________________________________________________________________
MAX9242
MAX9244
MAX9246
MAX9254
RxIN0+
RxIN0-
RxIN1+
RxIN1-
RxIN2+
RxIN2-
RxCLKIN+
RxCLKIN-
DCB
RxOUT0–RxOUT6
RxOUT7–RxOUT13
RxOUT14–RxOUT20
RxCLKOUT
SSG
SERIAL-TO-PARALLEL
CHANNEL 0
77
SERIAL-TO-PARALLEL
CHANNEL 1
77
SERIAL-TO-PARALLEL
CHANNEL 2
77
FIFO
PLL1
7x OR 9x STROBES
FIFO
CONTROL
SPREAD-
SPECTRUM
PLL (SSPLL)
CLK
IN
CLK
OUT
PARALLEL
CLOCK
PWRDWN
Functional Diagram
Pin Description (continued)
PIN NAME FUNCTION
34 RxOUT7
35 RxOUT8
37 RxOUT9
39 RxOUT10
40 RxOUT11
41 RxOUT12
Channel 1 Single-Ended Outputs
42 V
CC
Digital Supply Voltage. Bypass V
CC
to GND with 0.1µF and 0.001µF capacitors in parallel as close to the
pin as possible.
43 RxOUT13 Channel 1 Single-Ended Output
45 RxOUT14
46 RxOUT15
47 RxOUT16
Channel 2 Single-Ended Outputs