Datasheet

MAX9234/MAX9236/MAX9238
Hot-Swappable, 21-Bit, DC-Balanced LVDS
Deserializers
4
Maxim Integrated
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
and V
TL
.
Note 2: Maximum and minimum limits overtemperature are guaranteed by design and characterization. Devices are production
tested at T
A
= +25°C.
Note 3: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma.
Note 4: C
L
includes probe and test jig capacitance.
Note 5: RCIP is the period of RxCLK IN. RCOP is the period of RxCLK OUT. RCIP = RCOP.
Note 6: RSKM measured with
≤ 150ps cycle-to-cycle jitter on RxCLK IN.
AC ELECTRICAL CHARACTERISTICS
(V
CC
= V
CCO
= +3.0V to +3.6V, 100mV
P-P
at 200kHz supply noise, C
L
= 8pF, PWRDWN = high, differential input voltage ⏐V
ID
⏐ =
0.1V to 1.2V, input common mode voltage V
CM
= ⏐V
ID
/2⏐ to 2.4V - ⏐V
ID
/2⏐, T
A
= -40°C to +85°C, unless otherwise noted. Typical
values are at V
CC
= V
CCO
= +3.3V, ⏐V
ID
⏐ = 0.2V, V
CM
= 1.25V, T
A
= +25°C.) (Notes 3, 4, 5)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RxOUT 3.52 5.04 6.24
MAX9234/
MAX9236
RxCLK OUT 2.2 3.15 3.9
Output Rise Time CLHT
0.1V
CCO
to
0.9V
CCO
,
Figure 3
MAX9238 2.2 3.15 3.9
ns
RxOUT 1.95 3.18 4.35
MAX9234/
MAX9236
RxCLK OUT 1.3 2.12 2.9
Output Fall Time CHLT
0.9V
CCO
to
0.1V
CCO
,
Figure 3
MAX9238 1.3 2.12 2.9
ns
8MHz 6600 7044
16MHz 2560 3137
34MHz 900 1327
RxIN Skew Margin RSKM
Figure 4
(Note 6)
MAX9238 66MHz 330 685
ps
RxCLK OUT High Time RCOH Figures 5a, 5b
0.35 x
RCOP
ns
RxCLK OUT Low Time RCOL Figures 5a, 5b
0.35 x
RCOP
ns
RxOUT Setup to RxCLK OUT RSRC Figures 5a, 5b
0.30 x
RCOP
ns
RxOUT Hold from RxCLK OUT RHRC Figures 5a, 5b
0.45 x
RCOP
ns
RxCLK IN to RxCLK OUT Delay RCCD Figures 6a, 6b 4.9 6.17 8.1 ns
Deserializer Phase-Locked Loop
Set
RPLLS Figure 7
32800
x RCIP
ns
Deserializer Power-Down Delay RPDD Figure 8 100 ns