Datasheet

MAX9209/MAX9213
Programmable DC-Balanced
21-Bit Serializers
______________________________________________________________________________________ 13
Common-mode voltage differences may be due to
ground potential variation or common-mode noise. If
there is more than ±1V of difference, the receiver is not
guaranteed to read the input signal correctly and may
cause bit errors. AC-coupling filters low-frequency
ground shifts and common-mode noise and passes
high-frequency data. A common-mode voltage differ-
ence up to the voltage rating of the coupling capacitor
(minus half the differential swing) is tolerated. DC-bal-
anced coding of the data is required to maintain the dif-
ferential signal amplitude and limit jitter on an
AC-coupled link. A capacitor in series with each output
of the LVDS driver is sufficient for AC-coupling. However,
two capacitors—one at the serializer output and one at
the deserializer input—provide protection in case either
end of the cable is shorted to a high voltage.
5V Tolerant Inputs
All signal and control inputs except DCB/NC are 5V tol-
erant and are internally pulled down to GND. The
DCB/NC pin has a pullup on the MAX9209/MAX9213.
DCB/NC Pin Default Conditions
The MAX9209/MAX9213 have programmable DC bal-
ance/non-DC balance. See Table 1 for DCB/NC default
settings and operating modes.
(7 + 2):1
1:(9 - 2)
7
7
R
T
=
100Ω
R
T
=
100Ω
R
T
=
100Ω
R
T
=
100Ω
(7 + 2):1
1:(9 - 2)
7
7
(7 + 2):1
1:(9 - 2)
7
7
PLL
PLL
MAX9209
MAX9213
MAX9210
MAX9214
TxOUT
TxCLK OUT
RxIN
RxCLK IN
21:3 SERIALIZER 3:21 DESERIALIZER
PWRDWN
RxCLK OUT
RxOUT
PWRDWN
TxCLK IN
TxIN
HIGH-FREQUENCY CERAMIC
SURFACE-MOUNT CAPACITORS
CAN ALSO BE PLACED AT
SERIALIZER INSTEAD OF DESERIALIZER.
R
O
R
O
R
O
R
O
Figure 14. Two Capacitors per Link, AC-Coupled, DC-Balanced Mode