Datasheet
MAX9201/MAX9202/MAX9203
Low Cost, 7ns, Low-Power
Voltage Comparators
_______________________________________________________________________________________ 3
Note 1: All devices are 100% production tested at T
A
= +25°C. All temperature limits are guaranteed by design.
Note 2: Inferred by CMRR test.
Note 3: Tested for +4.75V < V
CC
< +5.25V, and -5.25V < V
EE
< -4.75V with V
DD
= +5V, although permissible analog power-supply
range is 4.75V < V
CC
< +10.5V for single supply operation with V
EE
grounded.
Note 4: Specification does not apply to MAX9201.
Note 5: I
CC
tested for 4.75V < V
CC
< +10.5V with V
EE
grounded. I
EE
tested for -5.25V < V
EE
< -4.75V with V
CC
= +5V. I
DD
tested for
+4.75V < V
DD
< +5.25V with all comparator outputs low, worst-case condition.
Note 6: Guaranteed by design. Times are for 100mV step inputs (see propagation delay characteristics in Figures 2 and 3)
Note 7: Maximum difference in propagation delay between two comparators in the MAX9201/MAX9202.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX9201 3.4 5.0
MAX9202 1.8 3.0
Negative Analog Supply
Current
I
EE
Note 5
MAX9203 1.0 1.6
mA
MAX9201 2 3.0
MAX9202 1 1.5Digital Supply Current I
DD
Note 5
MAX9203 0.5 0.8
mA
MAX9201 33 44
MAX9202 17 24
Power Dissipation P
D
V
CC
= V
DD
= +5V,
V
EE
= 0V
MAX9203 9 13
mW
TIMING CHARACTERISTICS
(V
CC
= +5V, V
EE
= -5V, V
DD
= +5V, GND = 0, V
CM
= 0, LATCH_ = logic high, T
A
= -40°C to +85°C. Typical values are at
T
A
= +25°C, unless otherwise noted.) (Notes 1, 6)
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +5V, V
EE
= -5V, V
DD
= +5V, GND = 0, V
CM
= 0, LATCH_ = logic high, T
A
= -40°C to +85°C. Typical values are at T
A
= +25°C,
unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
T
A
= +25° C79
Input-to-Output High
Response Time
t
PD+
V
OD
= 5mV,
C
L
= 15pF,
I
OUT
= 2mA
T
A
= -40°C to +85°C12
ns
T
A
= +25° C79
Input-to-Output Low
Response Time
t
PD-
V
OD
= 5mV,
C
L
= 15pF,
I
OUT
= 2mA
T
A
= -40°C to +85°C12
ns
Rise Time t
R
C
L
= 15pF,
I
OUT
= 2mA
T
A
= +25° C 2.0 ns
Fall Time t
F
C
L
= 15pF,
I
OUT
= 2mA
T
A
= +25° C 1.0 ns
T
A
= +25° C 0.5 1.5
Difference in Response Time
Between Outputs
∆t
PD
Note 7
T
A
= -40°C to +85°C 2.5
ns
Latch Disable to Output High
Delay
t
PD
+(D)
Note 4 10 ns
Latch Disable to Output Low
Delay
t
PD
-(D)
Note 4 10 ns
Minimum Setup Time t
S
Note 4 2 ns
Minimum Hold Time t
N
Note 4 1 ns
Minimum Latch Disable
Pulse Width
t
PW
(D)
Note 4 8 ns