Datasheet

The MAX9174/MAX9175 feature an integrated differen-
tial output resistor. This resistor reduces jitter by damp-
ing reflections produced by a mismatch between the
transmission line and termination resistor at the far end
of the interconnect.
Board Layout
Separate the differential and single-ended signals to
reduce crosstalk. A four-layer printed circuit board with
separate layers for power, ground, differential signals,
and single-ended logic signals is recommended.
Separate the differential signals from the logic signals
with power and ground planes for best results.
IEC 61000-4-2 Level 4
ESD Protection
The IEC 61000-4-2 standard (Figure 9) specifies ESD
tolerance for electronic systems. The IEC 61000-4-2
model specifies a 150pF capacitor that is discharged
into the device through a 330Ω resistor. The MAX9174/
MAX9175 differential inputs and outputs are rated for
IEC 61000-4-2 level 4 (±8kV Contact Discharge and
±15kV Air-Gap Discharge). The Human Body Model
(HBM, Figure 10) specifies a 100pF capacitor that is
discharged into the device through a 1.5kΩ resistor.
IEC 61000-4-2 level 4 discharges higher peak current
and more energy than the HBM due to the lower series
resistance and larger capacitor.
MAX9174/MAX9175
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
_______________________________________________________________________________________ 9
V
TEST
= 0 TO V
CC
V
OD
IN+
5kΩ
5kΩ
1.25V
1.20V
1.25V
1.20V
IN-
R
L
OUT_ -
OUT_+
Figure 2. V
OD
Test Circuit
IN+
1.25V
1.20V
1.25V
1.20V
IN-
R
L
/2
R
L
/2
OUT_ -
VOS
OUT_+
Figure 3. V
OS
Test Circuit
PULSE
GENERATOR
50Ω
C
L
50Ω
C
L
V
TEST
= 0 TO V
CC
IN+
5kΩ
5kΩ
IN-
R
L
OUT0-
OUT0+
C
L
C
L
5kΩ
5kΩ
R
L
OUT1-
OUT1+
Figure 4. Transition Time, Propagation Delay, and Output-to-Output Skew Test Circuit