Datasheet
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100
Ω
Drive
8 _______________________________________________________________________________________
Applications Information
Supply Bypassing
Bypass each V
CC
with high-frequency surface-mount
ceramic 0.1µF and 1nF capacitors in parallel as close
to the device as possible, with the smaller value capac-
itor closest to the V
CC
pin.
Traces, Cables, and Connectors
The characteristics of input and output connections
affect the performance of the MAX9153/MAX9154. Use
controlled-impedance traces, cables, and connectors
with matched characteristic impedance.
Ensure that noise couples as common mode by run-
ning the traces of a differential pair close together.
Reduce within-pair skew by matching the electrical
length of the traces of a differential pair. Excessive
skew can result in a degradation of magnetic field can-
cellation. Maintain the distance between traces of a dif-
ferential pair to avoid discontinuities in differential
impedance. Minimize the number of vias to further pre-
vent impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon
cable. Balanced cables, such as twisted pair, offer
superior signal quality and tend to generate less EMI
due to canceling effects. Balanced cables tend to pick
up noise as common mode, which is rejected by the
LVDS receiver.
Termination
The MAX9153/MAX9154 are specified for 100Ω differ-
ential characteristic impedance but can operate with
90Ω to 132Ω to accommodate various types of inter-
connect. The termination resistor should match the dif-
ferential characteristic impedance of the interconnect
and be located close to the LVDS receiver input. Use a
±1% surface-mount termination resistor.
The output voltage swing is determined by the value of the
termination resistor multiplied by the output current. With a
typical 3.8mA output current, the MAX9153/MAX9154 pro-
duce a 380mV output voltage when driving a transmission
line terminated with a 100Ω resistor (3.8mA x 100Ω =
380mV).
Chip Information
TRANSISTOR COUNT: 1394
PROCESS: CMOS
Figure 3. Driver-Load Test Circuit
RIN+
RIN-
GENERATOR
50Ω
50Ω
MAX9153
MAX9154
DO1+
DO10+
DO10-
DO1-
V
OD
V
OS
50Ω
50Ω
50Ω
50Ω
V
OS
V
OD
Test Circuits and Timing Diagrams










