Datasheet

MAX9152
or EN1 low puts the corresponding driver output into a
high-impedance state (the differential output resistance
also becomes high impedance).
Applications Information
Unused Differential Inputs
Unused differential inputs should be tied to ground and
V
CC
to prevent the high-speed input stage from switch-
ing due to noise. IN_+ should be pulled to V
CC
with
10kΩ and IN_- should be pulled to GND with 10kΩ.
Expanding the Number
of LVDS Output Ports
Devices can be cascaded to make larger switches.
Total propagation delay and total jitter should be con-
sidered to determine the maximum allowable switch
size. Three MAX9152s are needed to make a 2 input x
4 output crosspoint switch with two device propagation
delays. Seven MAX9152s make a 2 input x 8 output
crosspoint with three device delays.
Accepting PECL Inputs
The inputs accept PECL signals with the use of an
attenuation circuit, as shown in Figure 9.
Power-Supply Bypassing
Bypass V
CC
to ground with high-frequency surface-
mount ceramic 0.1µF and 0.001µF capacitors in paral-
800Mbps LVDS/LVPECL-to-LVDS 2 x 2
Crosspoint Switch
8 _______________________________________________________________________________________
1/2 MAX9152
3V
1.5V1.5V
EN_
50%
50%
50%
t
PHZ
t
PLZ
t
PZH
t
PZL
50%
0
VOH
1.2V
1.2V
VOL
PULSE
GENERATOR
OUT_+
OUT_-
V
ID
= (V
IN_+
)–(V
IN_-
)
V
OUT_
+ WHEN V
ID
= +100mV
V
OUT_
- WHEN V
ID
= -100mV
V
OUT_
+ WHEN V
ID
= -100mV
V
OUT_
- WHEN V
ID
= +100mV
C
L
R
L
/2
R
L
/2
+1.2V
IN_+
IN_-
EN_
50Ω
C
L
SEL0
SEL1
0
1
0
1
IN1+
IN1-
ENABLED
PULSE
GENERATOR
OUT0+
OUT0-
OUT1+
OUT1-
C
L
R
L
R
L
IN0+
IN0-
50Ω
C
L
50Ω
C
L
C
L
MAX9152
Figure 4. Output Active to High-Z and High-Z to Active Test
Circuit and Timing Diagram
Figure 5. Output Transition Time, Propagation Delay, and Output Channel-to-Channel Skew Test Circuit
SEL0 SEL1 OUT0 OUT1 MODE
L L IN0 IN0 1:2 splitter
L H IN0 IN1 Repeater
H L IN1 IN0 Switch
H H IN1 IN1 1:2 splitter
Table 1. Input/Output Function Table