Datasheet

DIFFERENTIAL OUTPUT EYE PATTERN
IN 1:2 SPLITTER MODE AT 800Mbps
CONDITIONS: 3.3V, PRBS = 2
23
-1 DATA PATTERN,
|V
ID
| = 200mV, V
CM
= +1.2V
HORIZONTAL SCALE = 200ps/div
VERTICAL SCALE = 100mV/div
MAX9152 toc01
150
250
350
450
550
650
50 10075 125 150 175 200
DIFFERENTIAL
OUTPUT VOLTAGE vs. LOAD
MAX9152 toc02
LOAD RESISTOR (Ω)
DIFFERENTIAL OUTPUT VOLTAGE (mV)
NC/RSEL = LOW OR OPEN
NC/RSEL = HIGH
30
32
36
34
38
40
100 300200 400 500 600 700 800
SUPPLY CURRENT vs. DATA RATE
MAX9152 toc03
DATA RATE (Mbps)
SUPPLY CURRENT (mA)
Typical Operating Characteristics
(V
CC
= +3.3V, R
L
= 100Ω, NC/RSEL = high, C
L
= 5pF, input transition time = 600ps (20% to 80%), V
ID
= 200mV, PRBS = 2
23
- 1 data
pattern, V
CM
= +1.2V, T
A
= +25°C, unless otherwise noted.)
MAX9152
800Mbps LVDS/LVPECL-to-LVDS 2 x 2
Crosspoint Switch
4 _______________________________________________________________________________________
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Pulse Skew |t
PLHD
-t
PHLD
| (Note 6) t
SKEW
Figures 5, 6 25 90 ps
Output Channel-to-Channel Skew t
CCS
Figures 5, 7 20 50 ps
Output Low-to-High Transition
Time (20% to 80%)
t
LHT
Figures 5, 6 160 270 480 ps
Output High-to-Low Transition
Time (20% to 80%)
t
HLT
Figures 5, 6 160 270 480 ps
V
ID
= 200mV, V
CM
= 1.2V, 50% duty
cycle, 800Mbps, input transition time =
600ps (20% to 80%)
10 30
LVDS Data Path Peak-to-Peak
Jitter (Note 7)
t
JIT
V
ID
= 200mV, V
CM
= 1.2V, PRBS = 2
23
- 1
data pattern, 800Mbps, input transition
time = 600ps (20% to 80%)
65 120
ps
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, NC/RSEL = open for R
L
= 75Ω ±1%, NC/RSEL = high for R
L
= 100Ω ±1%, C
L
= 5pF, differential input voltage
|V
ID
| = 0.15V to V
CC
, EN_ = high, SEL0 = low, SEL1 = high, differential input transition time = 0.6ns (20% to 80%), input voltage
(V
IN+
, V
IN-
) = 0 to V
CC
, LVCMOS/LVTTL inputs = 0 to 3V with 2ns (10% to 90%) transition times, T
A
= -40°C to +85°C. Typical values
at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= 1.2V, T
A
= +25°C, unless otherwise noted.) (Notes 3, 4)
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, V
TL
, V
ID
, V
OD
, and ∆V
OD
.
Note 2: Guaranteed by design and characterization, not production tested.
Note 3: AC parameters are guaranteed by design and characterization.
Note 4: C
L
includes scope probe and test jig capacitance.
Note 5: t
SET
and t
HOLD
time specify that data must be in a stable state before and after the SEL transition.
Note 6: t
SKEW
is the magnitude difference of differential propagation delay over rated conditions; t
SKEW
= |t
PHLD
- t
PLHD
|.
Note 7: Specification includes test equipment jitter.