Datasheet

MAX9129
Quad Bus LVDS Driver with
Flow-Through Pinout
6 _______________________________________________________________________________________
PIN
QFN TSSOP
NAME FUNCTION
15 1 EN
LVTTL/LVCMOS Enable Input. The driver is disabled when EN is low. EN is internally
pulled down. When EN = high and EN = low or open, the outputs are active. For other
combinations of EN and EN, the outputs are disabled and are high impedance.
1, 4, 5, 16 2, 3, 6, 7 IN_ LVTTL/LVCMOS Driver Inputs
24V
CC
Power-Supply Input. Bypass V
CC
to GND with 0.1µF and 0.001µF ceramic capacitors.
3 5 GND Ground
68EN
LVTTL/LVCMOS Enable Input. The driver is disabled when EN is high. EN is internally
pulled down.
7, 10, 11, 14 9, 12, 13, 16 OUT_- Inverting BLVDS Driver Outputs
8, 9, 12, 13 10, 11, 14, 15 OUT_+ Noninverting BLVDS Driver Outputs
Pin Description
Figure 3. Driver Propagation Delay and Transition Time Waveforms
0
V
OH
V
OL
IN_
OUT_
-
OUT_+
V
OD
V
CC
t
PHLD
50%
0
t
THL
20%
0
80%
80%
0
t
TLH
20%
0 DIFFERENTIAL
t
PLHD
50%
V
OD
= (V
OUT_
+) - (V
OUT_
-)
Figure 1. Driver V
OD
and V
OS
Test Circuit
V
OS
V
CC
GND
IN_
R
L
/2
R
L
/2
V
OS
V
OD
OUT_-
OUT_+
Figure 2. Driver Propagation Delay and Transition Time Test
Circuit
R
L
C
L
OUT_ +
OUT_ -
C
L
50Ω
IN_
GENERATOR