Datasheet

Test Circuit Diagrams
MAX9111/MAX9113
Single/Dual LVDS Line Receivers with
Ultra-Low Pulse Skew in SOT23
4 _______________________________________________________________________________________
C
L
GENERATOR
OUT_
R
IN_+
IN_-
50Ω
50Ω
V
OH
V
OL
IN_-
IN_+
OUT_
t
PHLD
+1.2V
t
THL
20%
80%
80%
50% 50%
t
TLH
20%
DIFFERENTIAL
0V
t
PLHD
V
ID
= 200mV
+1.1V
+1.3V
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
Figure 2. Receiver Propagation Delay and Transition Time Waveforms