Datasheet

MAX8903A–E/G/H/J/N/Y
2A 1-Cell Li+ DC-DC Chargers
for USB and Adapter Power
11
Maxim Integrated
Typical Operating Characteristics (continued)
(T
A
= +25°C, unless otherwise noted.)
100µs/div
USB DISCONNECT WITH NO DC
(R
SYS
= 25Ω)
2V/div
MAX8903A toc26
5V/div
500mA/div
500mA/div
3.6V
475mA
V
SYS
V
USB
I
USB
I
BAT
5V
144mA
-330mA
200
µ
s/div
USB SUSPEND
5V/div
MAX8903A toc27
500mA/div
2V/div
500mA/div
475mA
-475mA
V
USUS
I
USB
V
SYS
I
BAT
3V
0V
0A
3.7V
0A
200
µ
s/div
USB RESUME
5V/div
MAX8903A toc28
500mA/div
2V/div
500mA/div
475mA
-475mA
3V
0V
0A
3.6V
0A
3.6V
3.8V
BATTERY
CHARGER
SOFT-START
C
USB
CHARGING
V
USUS
I
USB
V
SYS
I
BAT
Pin Description
PIN NAME FUNCTION
1, 2 PG
Power Ground for Step-Down Low-Side Synchronous n-Channel MOSFET. Both PG pins must be
connected together externally.
3, 4 DC
DC Power Input. DC is capable of delivering up to 2A to SYS. DC supports both AC adapter and USB
inputs. The DC current limit is set through DCM, IUSB, or IDC depending on the input source used. See
Table 2. Both DC pins must be connected together externally. Connect at least a 4.7µF ceramic capacitor
from DC to PG.
5 DCM
Current-Limit Mode Setting for the DC Power Input. When logic-high, the DC input current limit is set by
the resistance from IDC to GND. When logic-low, the DC input current limit is internally programmed to
500mA or 100mA, as set by the IUSB logic input. There is an internal diode from DCM (anode) to DC
(cathode) as shown in Figure 1.
6 BST High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF ceramic capacitor.
7 IUSB
USB Current-Limit Set Input. Drive IUSB logic-low to set the USB current limit to 100mA. Drive IUSB logic-
high to set the USB current limit to 500mA.
8 DOK
DC Power-OK Output. Active-low open-drain output pulls low when a valid input is detected at DC. DOK
is still valid when the charger is disabled (CEN high).
9VL
Logic LDO Output. VL is the output of an LDO that powers the MAX8903_ internal circuitry and charges
the BST capacitor. Connect a 1µF ceramic capacitor from VL to GND.
10 CT
Charge Timer Set Input. A capacitor (C
CT
) from CT to GND sets the fast-charge and prequal fault timers.
Connect to GND to disable the timer.
11 IDC
DC Current-Limit Set Input. Connect a resistor (R
IDC
) from IDC to GND to program the current limit of the
step-down regulator from 0.5A to 2A when DCM is logic-high.
12 GND Ground. GND is the low-noise ground connection for the internal circuitry.