Datasheet

MAX8792
Single Quick-PWM Step-Down
Controller with Dynamic REFIN
14 ______________________________________________________________________________________
input voltage and directly proportional to output volt-
age. Another one-shot sets a minimum off-time (200ns
typ). The on-time one-shot is triggered if the error com-
parator is low, the low-side switch current is below the
valley current-limit threshold, and the minimum off-time
one-shot has timed out.
On-Time One-Shot
The heart of the PWM core is the one-shot that sets the
high-side switch on-time. This fast, low-jitter, adjustable
one-shot includes circuitry that varies the on-time in
response to input and output voltage. The high-side
switch on-time is inversely proportional to the input volt-
age as sensed by the TON input, and proportional to
the feedback voltage as sensed by the FB input:
On-Time (t
ON
) = T
SW
(V
FB
/V
IN
)
where T
SW
(switching period) is set by the resistance
(R
TON
) between TON and V
IN
. This algorithm results in
a nearly constant switching frequency despite the lack
of a fixed-frequency clock generator. Connect a resis-
tor (R
TON
) between TON and V
IN
to set the switching
period T
SW
= 1/f
SW
:
where C
TON
= 16.26pF. When used with unity-gain feed-
back (V
OUT
= V
FB
), a 96.75kΩ to 303.25kΩ corresponds
to switching periods of 167ns (600kHz) to 500ns
(200kHz), respectively. High-frequency (600kHz) opera-
tion optimizes the application for the smallest compo-
nent size, trading off efficiency due to higher switching
losses. This may be acceptable in ultra-portable devices
where the load currents are lower and the controller is
powered from a lower voltage supply. Low-frequency
(200kHz) operation offers the best overall efficiency at
the expense of component size and board space.
For continuous conduction operation, the actual switching
frequency can be estimated by:
where V
DIS
is the sum of the parasitic voltage drops in
the inductor discharge path, including synchronous recti-
fier, inductor, and PCB resistances; V
CHG
is the sum of
the parasitic voltage drops in the charging path, includ-
ing the high-side switch, inductor, and PCB resistances;
and t
ON
is the on-time calculated by the MAX8792.
Power-Up Sequence (POR, UVLO)
The MAX8792 is enabled when EN is driven high and
the 5V bias supply (V
DD
) is present. The reference
powers up first. Once the reference exceeds its UVLO
threshold, the internal analog blocks are turned on and
masked by a 50μs one-shot delay in order to allow the
bias circuitry and analog blocks enough time to settle
to their proper states. With the control circuitry reliably
powered up, the PWM controller may begin switching.
Power-on reset (POR) occurs when V
CC
rises above
approximately 3V, resetting the fault latch and prepar-
ing the controller for operation. The V
CC
UVLO circuitry
inhibits switching until V
CC
rises above 4.25V. The con-
troller powers up the reference once the system
enables the controller, V
CC
exceeds 4.25V, and EN is
driven high. With the reference in regulation, the con-
troller ramps the output voltage to the target REFIN volt-
age with a 1mV/μs slew rate:
The soft-start circuitry does not use a variable current
limit, so full output current is available immediately.
PGOOD becomes high impedance approximately
200μs after the target REFIN voltage has been reached.
The MAX8792 automatically uses pulse-skipping mode
during soft-start and uses forced-PWM mode during
soft-shutdown, regardless of the SKIP configuration.
For automatic startup, the battery voltage should be
present before V
CC
. If the controller attempts to bring
the output into regulation without the battery voltage
present, the fault latch trips. The controller remains shut
down until the fault latch is cleared by toggling EN or
cycling the V
CC
power supply below 0.5V.
If the V
CC
voltage drops below 4.25V, the controller
assumes that there is not enough supply voltage to
make valid decisions. To protect the output from over-
voltage faults, the controller shuts down immediately
and forces a high-impedance output (DL and DH
pulled low).
Shutdown
When the system pulls EN low, the MAX8792 enters
low-power shutdown mode. PGOOD is pulled low
immediately, and the output voltage ramps down with a
1mV/μs slew rate:
t
V
mV s
V
Vms
SHDN
FB FB
==
11μ
t
V
mV s
V
Vms
START
FB FB
==
11μ
f
VV
tVV V
SW
OUT DIS
ON IN DIS CHG
=
+
()
+ −()
TCR k
V
V
SW TON TON
FB
OUT
=+
⎛
⎝
⎜
⎞
⎠
⎟
(.)65 Ω