Datasheet

MAX8660/MAX8660A/MAX8660B/MAX8661
Conservative designers can choose to use the mini-
mums for I
LIM
, f, and L, however, it is statistically rare
for all three of these parameters to be at the minimum
value in any one given design. A more practical
method is to look at the how each individual variable
degrades the maximum output current and then take
the RMS of each variables contribution. Refer to the
spreadsheet (www.maxim-ic.com/tools/other/soft-
ware/MAX8660-step-down_output_current.xls) for
easy evaluation of the maximum output current. It pro-
vides results for both the absolute worst case and RMS
calculation methods.
1) Use the following equation to calculate the approxi-
mate duty cycle (D):
where:
V
OUT
= output voltage
I
OUTTAR
= target (desired) output current—cannot
be more than the minimum p-channel current-limit
threshold
R
N
= n-channel on-resistance
R
P
= p-channel on-resistance
R
L
= external inductor’s ESR
V
IN
= input voltage—MAXIMUM
2) Use the following equation to calculate the maximum
output current (I
OUTMAX
):
where:
I
LIM
= p-channel current-limit threshold—MINIMUM
V
OUT
= output voltage
D = approximate duty cycle derived from step 1
f = oscillator frequency—MINIMUM
L = external inductor’s inductance—MINIMUM
R
N
= n-channel on-resistance
R
L
= external inductor’s ESR
Applications Information
Power Dissipation
The MAX8660/MAX8661 have a thermal-shutdown fea-
ture that protects the IC from damage when the die tem-
perature exceeds +160°C (see the Thermal-Overload
Protection section for more information). To prevent ther-
mal overload and allow the maximum load current on
each regulator, it is important to ensure that the heat
generated by the MAX8660/MAX8661 can be dissipated
into the PC board. The exposed pad must be soldered to
the PC board, with multiple vias under the exposed pad
(EP) conducting heat to a ground plane.
The junction-to-case thermal resistance (θ
JC
) of the
MAX8660/MAX8661 is 2.7°C/W. When properly mount-
ed on a multilayer PC board, the junction-to-ambient
thermal resistance (θ
JA
) is typically 28°C/W.
PCB Layout and Routing
Good printed circuit board (PCB) layout is necessary to
achieve optimal performance. Conductors carrying dis-
continuous currents and any high-current path must be
made as short and wide as possible.
Refer to the MAX8660 EV kit data sheet for an example
of a good PCB layout. Place the bypass capacitors for
each power input pair (IN to AGND, PV1 to PG1, PV2 to
PG2, PV3, to PG3, and PV4 to PG4) as close as possible
to the IC.
The exposed pad (EP) is the main path for heat to exit
the IC. Connect EP to the ground plane with multiple
vias to allow heat to dissipate from the device.
I
I
VD
fL
RR
D
f
OUTMAX
LIM
OUT
NL
=
−
−
××
++
−
××
()
()
1
2
1
1
2
LL
D
VI RR
VI RR
OUT OUTTAR N L
IN OUTTAR N P
=
++
+−
()
()
High-Efficiency, Low-I
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, PMICs with Dynamic
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