Datasheet

MAX8655
Highly Integrated, 25A, Wide-Input,
Internal MOSFET, Step-Down Regulator
______________________________________________________________________________________ 19
The crossover frequency, f
C
, should be much higher
than the power-modulator pole f
pMOD
. Also, f
C
should
be less than or equal to 1/5 the switching frequency.
Select a value for f
C
in the range:
At the crossover frequency, the total loop gain must
equal 1, and is expressed as:
For the case where f
zMOD
is greater than f
C
:
Then R
C
can be calculated as:
where g
mEA
= 110µS.
The error-amplifier compensation zero formed by R
C
and C
C
should be set at the modulator pole f
PMOD
.
Calculate the value of C
C
as follows:
If f
zMOD
is less than 5 x f
C
, add a second capacitor C
F
from COMP to GND. The value of C
F
is:
As the load current decreases, the modulator pole
also decreases; however, the modulator gain increases
accordingly and the crossover frequency remains
the same.
For the case where f
zMOD
is less than f
C
:
The power modulator gain at f
C
is:
The error-amplifier gain at f
C
is:
Figure 11 is the simplified gain plot for the f
zMOD
< f
C
case.
R
C
is calculated as:
where g
mEA
= 110µS.
C
C
is calculated from:
C
F
is calculated from:
The current-mode control model on which the above
design procedure is based requires an additional high-
frequency term, G
S
(s), to account for the effect of sam-
pling the peak inductor current. The term G
S
(s)
produces additional phase lag at crossover and should
be modeled to estimate the phase margin obtainable
by the selected compensation components. As a final
step, it is useful to plot the dB gain and phase of the
following loop-gain transfer function and check the
C
Rf
F
C zMOD
=
××
1
2π
C
fR
C
p
MOD
C
=
××
1
2π
R
V
V
f
gG f
C
OUT
FB
C
mEA MOD fc zMOD
××
()
GgR
f
f
EA fc mEA C
zMOD
C
()
×
GG
f
f
MOD fc MOD dc
pMOD
zMOD
() ( )
C
Rf
F
C zMOD
=
××
1
2π
C
fR
C
pMOD C
=
××
1
2π
R
V
gVG
C
OUT
mEA FB MOD fc
=
××
()
GG
f
f
MOD fc MOD dc
pMOD
C
() ( )
GgR
EA fc mEA C()
GG
V
V
EA fc MOD fc
FB
OUT
() ()
××=1
ff
f
pMOD C
S
<<
5
GAIN
(dB)
FREQUENCY
f
pMOD
f
zMOD
fc
CLOSED LOOP
ERROR
AMPLIFIER
0dB
FB
DIVIDER
POWER
MODULATOR
Figure 11. Simplified Gain Plot for the f
zMOD
< f
C
Case