Datasheet

MAX8566
Chip Information
PROCESS: BiCMOS
1234567
10
11
12
13
14
15
16
31
30
29
28
27
26
+
25
MAX8566
THIN QFN
TOP VIEW
SS
REFIN
EN
SYNC
FREQ
SYNCOUT
GND
*EP
32
*CONNECT EP TO GND.
FB
V
DD
LSS
IN
IN
IN
IN
IN
PGND
PGND
PGND
PGND
PGND
LX
LX
LX
9
LX
LX
LX
8
24 23 22 21 20 19 18 17
LX
LX
BST
PWRGD
COMP
MODE
Pin Configuration
High-Efficiency, 10A, PWM
Internal-Switch Step-Down Regulator
______________________________________________________________________________________ 19
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages
. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
32 TQFN-EP T3255+4
21-0140 90-0012