Datasheet

MAX8537/MAX8538/MAX8539
Dual-Synchronous Buck Controllers for Point-of-
Load, Tracking, and DDR Memory Power Supplies
16 ______________________________________________________________________________________
venting the output capacitor voltage from further devia-
tion from its regulating value.
Do not exceed the capacitor’s voltage or ripple
current ratings.
MOSFET Selection
The MAX8537/MAX8538/MAX8539 controllers drive two
external, logic-level, N-channel MOSFETs as the circuit-
switch elements. The key selection parameters are:
1) On-resistance (R
DS(ON)
): the lower, the better.
2) Maximum drain-to-source voltage (V
DSS
): should be
at least 20% higher than the input supply rail at the
high-side MOSFET’s drain.
3) Gate charges (Q
g
, Q
gd
, Q
gs
): the lower, the better.
Choose MOSFETs with R
DS(ON)
rated at V
GS
= 4.5V. For
a good compromise between efficiency and cost,
choose the high-side MOSFET that has conduction loss
equal to the switching loss at the nominal input voltage
and maximum output current. For the low-side MOSFET,
make sure it does not spuriously turn on due to dV/dt
caused by the high-side MOSFET turning on, as this
results in shoot-through current degrading the efficiency.
MOSFETs with a lower Q
gd
/Q
gs
ratio have higher immu-
nity to dV/dt.
For proper thermal-management design, the power dis-
sipation must be calculated at the desired maximum
operating junction temperature, maximum output cur-
rent, and worst-case input voltage (for low-side
MOSFET, worst case is at V
IN(MAX)
; for high-side
MOSFET, it could be either at V
IN(MIN)
or V
IN(MAX)
).
High-side and low-side MOSFETs have different loss
components due to the circuit operation. The low-side
MOSFET, operates as a zero-voltage switch; therefore,
the major losses are the channel conduction loss
(P
LSCC
) and the body-diode conduction loss (P
LSDC
):
P
LSCC
= [1 - (V
OUT
/ V
IN
)] x (I
LOAD
)
2
x R
DS,ON
Use R
DS,ON
at T
J(MAX)
:
P
LSDC
= 2 x I
LOAD
x V
F
x t
dt
x f
S
where V
F
is the body-diode forward voltage drop, t
dt
is
the dead-time between the high-side MOSFET and the
low-side MOSFET switching transitions, and f
S
is the
switching frequency.
The high-side MOSFET operates as a duty-cycle control
switch and has the following major losses: the channel
conduction loss (P
HSCC
), the V I overlapping switching
loss (P
HSSW
), and the drive loss (P
HSDR
). The high-side
MOSFET does not have body-diode conduction loss
because the diode never conducts current.
P
HSCC
= (V
OUT
/ V
IN
) x I
2
LOAD
x R
DS(ON)
Use R
DS(ON)
at T
J(MAX):
P
HSSW
= V
IN
x I
LOAD
x f
S
x [(Q
gs
+ Q
gd
) / I
GATE
]
where I
GATE
is the average DH-high driver output-
current capability determined by:
I
GATE(ON)
= 2.5 / (R
DH
+ R
GATE
)
where R
DH
is the high-side MOSFET driver’s average
on-resistance (1.1Ω typ) and R
GATE
is the internal gate
resistance of the MOSFET (~2Ω):
P
HSDR
= Q
gs
x V
GS
x f
S
x R
GATE
/ (R
GATE
+ R
DH
)
where V
GS
~ VL = 5V
.
In addition to the losses above, approximately 20% more
for additional losses due to MOSFET output capaci-
tances and low-side MOSFET body-diode reverse-recov-
ery charge dissipated in the high-side MOSFET that
exists, but is not well defined in the MOSFET data sheet.
Refer to the MOSFET data sheet for thermal-resistance
specification to calculate the PC board area needed to
maintain the desired maximum operating junction tem-
perature with the above-calculated power dissipation.
To reduce EMI caused by switching noise, add a 0.1µF
ceramic capacitor from the high-side switch drain to
the low-side switch source or add resistors in series
with DH and DL to slow down the switching transitions.
However, adding series resistors increases the power
dissipation of the MOSFETs, so be sure this does not
overheat the MOSFETs.
The minimum load current must exceed the high-side
MOSFET’s maximum leakage current over temperature
if fault conditions are expected.
Current-Limit Setting
The MAX8537/MAX8538/MAX8539 controllers sense
the peak inductor current to provide constant current
and hiccup current limit. The peak current-limit thresh-
old is set by an external resistor together with the inter-
nal current sink of 200µA. The voltage drop across the
resistor R
ILIM_
with 200µA current through it sets the
maximum peak inductor current that can flow through
the high-side MOSFET or the optional current-sense
resistor by the equations below:
I
PEAK(MAX)
= 200µA x R
ILIM_
/ R
DSON(HSFET)
or
I
PEAK(MAX)
= 200µA x R
ILIM_
/ R
SENSE
R
ILIM_
should be less than 1.5kΩ for optimum current-
limit accuracy. The actual corresponding maximum
load current is lower than the I
PEAK(MAX)
above by half