Datasheet

MAX8520/MAX8521
Smallest TEC Power Drivers for Optical
Modules
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
DD
to GND..............................................................-0.3V to +6V
SHDN, MAXV, MAXIP, MAXIN,
CTLI to GND .........................................................-0.3V to +6V
COMP, FREQ, OS1, OS2, CS, REF,
ITEC to GND...........................................-0.3V to (V
DD
+ 0.3V)
PVDD1, PVDD2 to GND .............................-0.3V to (V
DD
+ 0.3V)
PVDD1, PVDD2 to V
DD
..........................................-0.3V to +0.3V
PGND1, PGND2 to GND .......................................-0.3V to +0.3V
COMP, REF, ITEC short to GND....................................Indefinite
LX Current (Note 1) ........................................±2.25A LX Current
Continuous Power Dissipation (T
A
= +70°C)
6 x 6 UCSP (derate 22mW/°C above +70°C) ...............1.75W
20-Pin 5mm x 5mm x 0.9mm TQFN (derate 20.8mW/°C
above +70°C) (Note 2)...................................................1.67W
36-Bump WLP (derate 22mW/°C above +70°C)............1.75W
Operating Temperature Range ...........................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow)
Lead(Pb)-Free (TQFN, WLP)........................................+260°C
Containing Lead (UCSP)............................................. +240°C
ELECTRICAL CHARACTERISTICS
(V
DD
= V
PVDD1
= V
PVDD2
= V
SHDN
= 5V, 1MHz mode (Note 4). PGND1 = PGND2 = GND, CTLI = MAXV = MAXIP = MAXIN = REF,
T
A
= 0°C to +85°C, unless otherwise noted. Typical values at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Supply Range V
DD
3.0 5.5 V
Maximum TEC Current ±1.5 A
Reference Voltage V
REF
V
DD
= 3V to 5.5V, I
REF
= 150µA 1.485 1.500 1.515 V
Reference Load Regulation ∆V
REF
V
DD
= 3V to 5V, I
REF
= 10µA to 1mA 1.2 5.0 mV
V
MAXI_
= V
REF
140 150 160
V
DD
= 5V
V
MAXI_
= V
REF
/3 40 50 60
V
MAXI_
= V
REF
143 150 155
MAXIP/MAXIN Threshold
Accuracy
V
DD
= 3V
V
MAXI_
= V
REF
/3 45 50 55
mV
V
DD
= 5V, I = 0.2A 0.09 0.14
nFET On-Resistance R
DS
(
ON-N
)
V
DD
= 3V, I = 0.2A 0.11 0.16
Ω
V
DD
= 5V, I = 0.2A 0.14 0.23
pFET On-Resistance R
DS
(
ON-P
)
V
DD
= 3V, I = 0.2A 0.17 0.30
Ω
V
LX
= V
DD
= 5V, T
A
= +25°C 0.03 4.00
nFET Leakage I
LEAK(N)
V
LX
= V
DD
= 5V T
A
= +85°C 0.3
µA
V
LX
= 0V, T
A
= +25°C 0.03 4.00
pFET Leakage I
LEAK(P)
V
LX
= 0V, T
A
= +85°C 0.3
µA
Note 1: LX has internal clamp diodes to PGND and PVDD. Applications that forward bias these diodes should take care not to
exceed the IC’s package power dissipation limits.
Note 2: Solders underside metal slug to PCB ground plane.
PACKAGE THERMAL CHARACTERISTICS (Note 3)
20 TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
)...............30°C/W
Junction-to-Case Thermal Resistance (θ
JC
)......................2°C/W
6x6 UCSP
Junction-to-Ambient Thermal Resistance (θ
JA
)................65.5°C/W
Junction-to-Case Thermal Resistance (θ
JC
).......................0°C/W
36 WLP
Junction-to-Ambient Thermal Resistance (θ
JA
)..................38°C/W
Junction-to-Case Thermal Resistance (θ
JC
)......................4°C/W
Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.