Datasheet

MAX814/MAX815/MAX816
Negative-Going V
CC
Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, the MAX814/
MAX815/MAX816 series is relatively immune to short
duration negative-going V
CC
transients (glitches). The
Typical Operating Characteristics show a graph of
Maximum Transient Duration vs. Reset Comparator
Overdrive, for which a reset is not generated. The
graph was made using a negative-going pulse applied
to V
CC
, starting 1.5V above the actual reset threshold
and ending below it by the magnitude indicated (reset
comparator overdrive). The graph indicates the typical
maximum pulse width a negative-going V
CC
transient
may have without causing a reset pulse. As the magni-
tude of the transient increases (goes further below the
reset threshold), the maximum allowable pulse width
decreases. Typically, a V
CC
that goes 100mV below the
reset threshold and lasts 30µs or less will not cause a
reset pulse to be issued.
A 0.1µF bypass capacitor mounted as close as possible
to pin 2 (V
CC
) provides additional transient immunity.
Interfacing to µPs
with Bidirectional Reset Pins
µPs with bidirectional reset pins, such as the Motorola
68HC11 series, can cause a conflict with the RESET
output. If, for example, the RESET
output is driven high
and the µP wants to pull it low, indeterminate logic lev-
els may result. To correct this, connect a 4.7kΩ resistor
between the RESET
output and the µP reset I/O, as in
Figure 14. Buffer the RESET output to other system
components.
±1% Accuracy, Low-Power, +3V and +5V
µP Supervisory Circuits
14 ______________________________________________________________________________________
Figure 12. Monitoring a Negative Voltage
Figure 13. Flow Chart of WDI Implementation
MAX814
MAX815
MAX816
RESET
R2
R1
+5V
V-
V
CC
PFI
GND
MR
PFO
TO µP
100kΩ
100kΩ
2N3904
MR
PFO
+5V
0V
+5V
0V
V
TRIP 0V
V-
V
PFT
= 2.5V (K, L, N); 1.70V (T AND MAX816)
5 - 2.5
=
2.5 - V
TRIP ,
V
TRIP
< 0V
R1 R2
BEGIN PROGRAM
SET LOW
WDI
SET HIGH
WDI
SUBROUTINE
SET LOW
WDI
YES
NO
RETURN
Figure 14. Interfacing to µPs with Bidirectional Reset I/O
MAX814
MAX815
MAX816
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
4.7kΩ
V
CC
GND
RESET
V
CC
GND
RESET
µP