Datasheet

Note 1: All parameters are tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: C
b
= total capacitance of one bus line in pF. t
R
and t
F
measured between 0.3 x V+ and 0.7 x V+ with I
SINK
≤ 6mA.
Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
(V+ = +1.71V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Serial-Clock Frequency fSCL 400 kHz
Bus Free Time Between a STOP
and a START Condition
tBUF 1.3 µs
Hold Time (Repeated) START
Condition
tHD, STA 0.6 µs
Repeated START Condition Setup
Time
tSU, STA 0.6 µs
STOP Condition Setup Time tSU, STO 0.6 µs
Data Hold Time tHD, DAT (Note 2) 0.9 µs
Data Setup Time tSU, DAT 100 ns
SCL Clock Low Period tLOW 1.3 µs
SCL Clock High Period tHIGH 0.7 µs
Rise Time of Both SDA and SCL
Signals, Receiving
tR (Notes 3, 4)
20 +
0.1Cb
300 ns
Fall Time of Both SDA and SCL
Signals, Receiving
tF (Notes 3, 4)
20 +
0.1Cb
300 ns
Fall Time of SDA, Transmitting tF,TX (Notes 3, 4)
20 +
0.1Cb
250 ns
Pulse Width of Spike Suppressed tSP (Note 5) 50 ns
Capacitive Load for Each Bus Line Cb (Note 3) 400 pF
RST Pulse Width tW 500 ns
RST Rising to START Condition
Setup Time
tRST 1 µs
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Port Output Data Valid tPPV CL ≤ 100pF 4 µs
Port Input Setup Time tPSU CL ≤ 100pF 0 µs
Port Input Hold Time tPH CL ≤ 100pF 4 µs
INT Input Data Valid Time tIV CL ≤ 100pF 4 µs
INT Reset Delay Time from STOP tIP CL ≤ 100pF 4 µs
INT Reset Delay Time from
Acknowledge
tIR CL ≤ 100pF 4 µs
www.maximintegrated.com
Maxim Integrated │ 3
MAX7322 I
2
C Port Expander with
4 Push-Pull Outputs and 4 Inputs
Timing Characteristics
Port and Interrupt INT Timing Characteristics