Datasheet

MAX7318
Detailed Description
The MAX7318 general-purpose input/output (GPIO)
peripheral provides up to 16 I/O ports, controlled
through an I
2
C-compatible serial interface. The
MAX7318 consists of input port registers, output port
registers, polarity inversion registers, and configuration
registers. Upon power-on, all I/O lines are set as inputs.
Three slave ID address select pins, AD0, AD1, and
AD2, choose one of 64 slave ID addresses, including
the eight addresses supported by the Phillips PCA9555.
Table 1 is the register address table. Tables 2–5 show
detailed register information.
Serial Interface
Serial Addressing
The MAX7318 operates as a slave that sends and
receives data through a 2-wire interface. The interface
uses a serial data line (SDA) and a serial clock line
(SCL) to achieve bidirectional communication between
master(s) and slave(s). A master, typically a microcon-
troller, initiates all data transfers to and from the
MAX7318, and generates the SCL clock that synchro-
nizes the data transfer (Figure 2).
2-Wire-Interfaced, 16-Bit, I/O Port Expander
with Interrupt and Hot-Insertion Protection
6 _______________________________________________________________________________________
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
INPUT/OUTPUT
PORT 1
SMBus
CONTROL
8 BIT
READ PULSE
WRITE PULSE
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
INPUT/OUTPUT
PORT 2
8 BIT
READ PULSE
WRITE PULSE
INT
POWER-ON
RESET
INPUT
FILTER
N
V+
SDA
SCL
AD2
AD1
AD0
GND
MAX7318
Figure 1. Block Diagram
SCL
SDA
START CONDITIONSTOP CONDITION
REPEATED START CONDITION
START CONDITION
t
SU,DAT
t
HD,DAT
t
LOW
t
HD,STA
t
HIGH
t
R
t
F
t
SU,STA
t
HD,STA
t
SU,STO
t
BUF
Figure 2. 2-Wire Serial Interface Timing Diagram