Datasheet

Connecting Multiple MAX7317s to the
4-Wire Bus
Multiple MAX7317s can be interfaced to a common SPI
bus by connecting DIN inputs together, SCLK inputs
together, and providing an individual CS per the MAX7317
device (Figure 2). This connection works regardless of
the configuration of DOUT/OSC, but does not allow the
MAX7317s to be read.
Table 4. Output Registers Format
Table 3. Input Ports Register
REGISTER R/W
ADDRESS
CODE
(hex)
REGISTER DATA
BINARY
hex
D7 D6 D5 D4 D3 D2 D1 D0
Port P0 level —
0x00
MSB Output P0 level and PWM LSB
Port P0 is open-drain logic low — 0 0 0 0 0 0 0 0 0x00
Port P0 is open-drain logic high (high
impedance without external pullup) or
logic input
— 0 0 0 0 0 0 0 1 0x01
Port P1 level — 0x01 MSB Port P1 level LSB
0x00
or
0x01
Port P2 level — 0x02 MSB Port P2 level LSB
Port P3 level — 0x03 MSB Port P3 level LSB
Port P4 level —- 0x04 MSB Port P4 level LSB
Port P5 level — 0x05 MSB Port P5 level LSB
Port P6 level — 0x06 MSB Port P6 level LSB
Port P7 level — 0x07 MSB Port P7 level LSB
Port P8 level — 0x08 MSB Port P8 level LSB
Port P9 level — 0x09 MSB Port P9 level LSB
Writes ports P0 through P9
with same level
0
0x0A
MSB Ports P0 through P9 level LSB
Reads port P0 level 1 MSB Port P0 level LSB
Writes ports P0 through P3
with same level
0
0x0B
MSB Ports P0 through P3 level LSB
Reads port P0 level 1 MSB Port P0 level LSB
Writes ports P4 through P7
with same level
0
0x0C
MSB Ports P4 through P7 level LSB
Reads port P4 level 1 MSB Port P4 level LSB
Write ports P8 and P9 with same level 0
0x0D
MSB Ports P8, P9 level LSB
Read port P8 level 1 MSB Port P8 level LSB
REGISTER R/W
ADDRESS
CODE
(hex)
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Read input ports P7–P0 1 0X0E
Port
P7
Port
P6
Port
P5
Port
P4
Port
P3
Port
P2
Port
P1
Port
P0
Read input ports P9, P8 1 0X0F 0 0 0 0 0 0
Port
P9
Port
P8
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Maxim Integrated │ 7
MAX7317 10-Port SPI-Interfaced I/O Expander with
Overvoltage and Hot-Insertion Protection