Datasheet

MAX7313
If blinking is enabled, then both interrupt output con-
trols O0 and O1 set the logic state of the INT/O16 pin
according to the blink phase. PWM intensity control for
O16 is set by the 4 global intensity bits in the master
and O16 intensity register (Table 13).
Blink Mode
In blink mode, the output ports can be flipped between
using either the blink phase 0 registers or the blink phase
1 registers. Flip control is by software control (the blink
flip flag B in the configuration register) (Table 4). If hard-
ware flip control is needed, consider the MAX7314, which
includes a BLINK input, as well as software control.
The blink function can be used for LED effects by pro-
gramming different display patterns in the two sets of
output port registers, and using the software or hard-
ware controls to flip between the patterns.
If the blink phase 1 registers are written with 0xFF, then
the BLINK input can be used as a hardware disable to,
for example, instantly turn off an LED pattern pro-
grammed into the blink phase 0 registers. This tech-
nique can be further extended by driving the BLINK
input with a PWM signal to modulate the LED current to
provide fading effects.
The blink mode is enabled by setting the blink enable
flag E in the configuration register (Table 4). When blink
mode is enabled, the state of the blink flip flag sets the
phase, and the output ports are set by either the blink
phase 0 registers or the blink phase 1 registers (Table 7).
The blink mode is disabled by clearing the blink enable
flag E in the configuration register (Table 4). When blink
mode is disabled, the state of the blink flip flag is
ignored, and the blink phase 0 registers alone control
the output ports.
Blink Phase Registers
When the blink function is disabled, the two blink phase
0 registers set the logic levels of the 16 ports (P0 through
P15) when configured as outputs (Table 8). A duplicate
pair of registers called the blink phase 1 registers are
also used if the blink function is enabled (Table 9). A
logic high sets the appropriate output port high imped-
ance, while a logic low makes the port go low.
Reading a blink phase register reads the value stored
in the register, not the actual port condition. The port
output itself may or may not be at a valid logic level,
depending on the external load connected.
16-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
16 ______________________________________________________________________________________
Table 5. Ports Configuration Registers
REGISTER DATA
REGISTER R/W
ADDRESS
CODE
(HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Ports configuration P7–P0
(1 = input, 0 = output)
0
Read back ports configuration P7–P0 1
0x06 OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0
Ports configuration P15–P8
(1 = input, 0 = output)
0
Read back ports configuration P15–P8 1
0x07 OP15 OP14 OP13 OP12 OP11 OP10 OP9 OP8
Table 6. Input Ports Registers
REGISTER DATA
REGISTER R/W
ADDRESS
CODE
(HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Read input ports P7–P0 1 0x00 IP7 IP6 IP5 IP4 IP3 IP2 IP1 IP0
Read input ports P15–P8 1 0x01 IP15 IP14 IP13 IP12 IP11 IP10 IP9 IP8
Table 7. Blink Controls
BLINK
ENABLE
FLAG E
BLINK
FLIP
FLAG B
BLINK
FUNCTION
OUTPUT
REGISTERS
USED
0 X Disabled
Blink phase 0
registers
0
Blink phase 0
registers
1
1
Enabled
Blink phase 1
registers
X = Don’t care.