Datasheet

Detailed Description
The MAX7310 general-purpose input/output (GPIO)
peripheral provides up to eight I/O ports, controlled
through an I
2
C-compatible serial interface. The
MAX7310 consists of an input port register, an output
port register, a polarity inversion register, a configura-
tion register, and a bus timeout register. An active-low
reset input sets the eight I/O lines as inputs. Three
slave ID address select pins (AD0, AD1, and AD2)
choose one of 56 slave ID addresses (Figure 1).
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
_______________________________________________________________________________________________________ 5
Pin Description
PIN
TSSOP/
QSOP
THIN
QFN
NAME FUNCTION
1 15 SCL Serial Clock Line
2 16 SDA Serial Data Line
3 1 AD0 Address Input 0
4 2 AD1 Address Input 1
5 3 AD2 Address Input 2
6 4 I/O0 Input/Output Port 0 (Open Drain)
7 5 I/O1 Input/Output Port 1
8 6 GND Supply Ground
9–14 7–12 I/O2–I/O7 Input/Output Port 2—Input/Output Port 7
15 13 RESET
External Reset (Active Low). Pull RESET low to configure I/O pins as inputs. Set RESET
high for normal operation.
16 14 V+ Supply Voltage. Bypass with a 0.047µF capacitor to GND.
— PAD
Exposed
pad
Exposed Pad on Package Underside. Connect to GND.
Figure 1. MAX7310 Block Diagram
AD0
AD1
AD2
SCL
SDA
SMBus
CONTROL
INPUT
FILTER
POWER-ON
RESET
RESET
GND
V+
INPUT/
OUTPUT
PORTS
WRITE PULSE
READ PULSE
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
8 BIT
N
MAX7310