Datasheet

MAX71020
Single-Chip Electricity Meter AFE
26Maxim Integrated
Table 8. Hardware Control Register Map (continued)
*Default values given for standard CE code (2520 sample frequency, gain = 9).
NAME
BYTE
ADDRESS
R/W
DEFAULT
VALUE*
DESCRIPTION
M_STAT 0x310 R
0x0100
0100
Reflects the status of several asynchronous events in the AFE. Bits are
automatically cleared after the host controller reads M_STAT.
BIT NAME DESCRIPTION
0 F_WPULSE Set on start of WPULSE
1 F_VPULSE Set on start of VPULSE
2 F_XPULSE Set on start of XPULSE
3 F_YPULSE Set on start of YPULSE
4 F_XDATA Set when data available
5 F_CEBUSY Set at end of CE code pass
6 Reserved —
7 F_VSTAT Set when VSYS status changes
8 F_RESET Set following AFE reset
15:9 Reserved —
16 F_WPULSE Copy of bit 0
17 F_VPULSE Copy of bit 1
18 F_XPULSE Copy of bit 2
19 F_YPULSE Copy of bit 3
20 F_XDATA Copy of bit 4
21 F_CEBUSY Copy of bit 5
23:22 Reserved —
24 F_RESET Copy of bit 8
31:25 Reserved —
M_STAT_B 0x311 R
0x0000
0000
Backup of M_STAT – updated when M_STAT is read. If M_STAT_B is different
from M_STAT, it signals to the host that something has changed (status
change detect).
BIT NAME DESCRIPTION
0 FB_WPULSE Set on start of WPULSE
1 FB_VPULSE Set on start of VPULSE
2 FB_XPULSE Set on start of XPULSE
3 FB_YPULSE Set on start of YPULSE
4 FB_XDATA Set when data available
5 FB_CEBUSY Set at end of CE code pass
7:6 Reserved —
8 FB_RESET Set following AFE reset
15:9 Reserved —
16 FB_WPULSE Copy of bit 0
17 FB_VPULSE Copy of bit 1
18 FB_XPULSE Copy of bit 2
19 FB_YPULSE Copy of bit 3
20 FB_XDATA Copy of bit 4
21 FB_CEBUSY Copy of bit 5
23:22 Reserved —
24
FB_RESET Copy of bit 8
31:25 Reserved —