Datasheet

MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
6 _______________________________________________________________________________________
Pin Description
MAX706P
MAX706AP
MAX706R/S/T,
MAX706AR/AS/AT
MAX708R/S/T
SO/DIP µMAX SO/DIP µMAX SO/DIP µMAX
NAME FUNCTION
131313MR
Acti ve-Low , M anual -Reset Inp ut. P ull M R b el ow 0.6V to tr i gg er a
r eset pul se. M R i s TTL/C M OS com p ati b l e w hen V
C C
= 5V and can
b e shorted to GN D wi th a swi tch. M R i s i nter nal l y connected to a
70µA sour ce curr ent. C onnect to V
C C
or l eave unconnected .
242424V
C C
S upp l y V ol tag e Inp ut
3 5 3 5 3 5 GND Ground
4 6 4 6 4 6 PFI
Adjustable Power-Fail Comparator Input. Connect PFI to a
resistive divider to set the desired PFI threshold. When PFI is
less than 1.25V, PFO goes low and sinks current; otherwise,
PFO remains high. Connect PFI to GND if not used.
575757PFO
Active-Low, Power-Fail Comparator Output. PFO asserts when
PFI is below the internal 1.25V threshold. PFO deasserts when
PFI is above the internal 1.25V threshold. Leave PFO
unconnected if not used.
6 8 6 8 — — WDI
Watchdog Input. A falling or rising transition must occur at
WDI within 1.6s to prevent WDO from asserting (see Figure 4).
The internal watchdog timer is reset to zero when reset is
asserted or when transition occurs at WDI. The watchdog
function for the MAX706P/R/S/T can not be disabled. The
watchdog timer for the MAX706AP/AR/AS/AT disables when
WDI input is left open or connected to a tri-state output in its
high-impedance state with a leakage current of less than
600nA.
7 1 — — 8 2 RESET
Active-High Reset Output. RESET remains high when V
CC
is
below the reset threshold or MR is held low. It remains low for
200ms after the reset conditions end (Figure 3).
8282——WDO
Active-Low Watchdog Output. WDO goes low when a
transition does not occur at WDI within 1.6s and remains low
until a transition occurs at WDI (indicating the watchdog
interrupt has been serviced). WDO also goes low when V
CC
falls below the reset threshold; however, unlike the reset
output signal, WDO goes high as soon as V
CC
rises above
the reset threshold.
——7 171RESET
Active-Low Reset Output. RESET remains low when V
CC
is
below the reset threshold or MR is held low. It remains low for
200ms after the reset conditions end (Figure 3).
— — — — 6 8 N.C. No Connection. Not internally connected.