Datasheet

25Maxim Integrated
280MHz to 450MHz Programmable
ASK/FSK Transmitter
MAX7060
— Reserved signals
nock No-clock flag (1) if crystal oscillator is dis-
abled, and (0) ic clock activity is observed
ckd4 Crystal clock signal divided by 4
ckd16 Crystal clock signal divided by 16
ckout Clock output signal, according to pro-
grammed dividers (ckdiv[2:0])
enable Internal enable signal (OR function of the
ENABLE pin and enable bit)
cap[4:0] SPI mode capacitor setting
frac_fxdb Fractional-N mode (1) or ASK fixed-N mode
(0)
capfxd[4:0] Emulation mode variable capacitor setting
notover ASK digital shaping flag (1) when PA power
value is different than 0
integ[3:0] Fractional-N 4-bit integer value
frac[11:0] Fractional-N 12-bit fractional value
xmit_en Transmitter PA enable flag
lockdet PLL lock-detect flag
Table 21. Enable (EnableReg) Register (Address: 0x10)
Table 22. Data Input (DataReg) Register (Address: 0x11)
Table 23. Status (Status) Register (Address: 0x12)
Table 24. Status Bus Signals
BIT NAME FUNCTION
0 enable
SPI equivalent of the ENABLE pin, which should be kept low (0) if the external ENABLE pin is used. The
external ENABLE pin should also be kept low (0) if the enable bit is used.
BIT NAME FUNCTION
0 datain
SPI equivalent of DIN, where the transmitted data can be controlled through the SPI interface. It should
be kept low (0) if only the external DIN pin is used. The external DIN pin should also be kept low (0) if the
datain bit is used.
BIT NAME FUNCTION
7:0 status[7:0] Read-only status register, selected through tmux[2:0] (register 0x04 IOConf0)
tmux[2:0] status[7] status[6] status[5] status[4] status[3] status[2] status[1] status[0]
0 — — — — ckout ckd16 ckd4 nock
1 — — — — — — — —
2 — — — — enable — — —
3 — frac_fxdb — cap[4] cap[3] cap[2] cap[1] cap[0]
4 — — notover capfxd[4] capfxd[3] capfxd[2] capfxd[1] capfxd[0]
5 integ[3] integ[2] integ[1] integ[0] frac[11] frac[10] frac[9] frac[8]
6 frac[7] frac[6] frac[5] frac[4] frac[3] frac[2] frac[1] frac[0]
7 — — — — — — lockdet xmit_en