Datasheet

12 Maxim Integrated
280MHz to 450MHz Programmable
ASK/FSK Transmitter
MAX7060
Pin Description
PIN NAME FUNCTION
1 GPO2_MOD
(SPI Mode/Manual Mode) Digital Input/Output. GPO2 output in SPI mode. Acts as an SPI data
output when CS_DEV is low. ASK (0)/FSK (1) modulation select input in manual mode. This pin is
internally pulled down in manual mode.
2 GPO1
General-Purpose Output 1. In SPI mode, this pin can output many internal status signals. In
manual mode, this pin outputs the synthesizer lock-detect (lockdet) signal.
3 DVDD
Digital-Supply Voltage Input. Bypass to GND with a 0.01FF capacitor as close as possible to the pin.
4 GPOVDD
Power-Supply Voltage Input for GPOs and ESD-Protection Devices. Bypass to GND with a
0.01FF capacitor as close as possible to the pin.
5 FREQ0
Frequency-Select Pin 0 in Manual Mode. Internally pulled down. FREQ0 = FREQ1 = FREQ2 = 0
for SPI mode.
6 FREQ1
Frequency-Select Pin 1 in Manual Mode. Internally pulled down. FREQ0 = FREQ1 = FREQ2 = 0
for SPI mode.
7 FREQ2
Frequency-Select Pin 2 in Manual Mode. Internally pulled down. FREQ0 = FREQ1 = FREQ2 = 0
for SPI mode.
8 LSHDN
Low-Power Shutdown Current-Select Digital Input. Turns off internal POR circuit and disables
pullup/pulldown currents. Must be driven low for normal operation in 3V mode. Functional only in
3V mode. Connect to GND in 5V mode.
9, 15, 24 N.C. No Connection. Internally not connected. Leave unconnected.
10 PAOUT
Power Amplifier Output. Requires a pullup inductor to PAVOUT, which can be part of the output-
matching network to an antenna.
11 PAVDD
Power Amplifier Predriver Power-Supply Input. Bypass to GND with a 680pF capacitor and a
0.01FF as close as possible to the pin.
12 ROUT
Envelope-Shaping Resistor Connection. See the Typical Application Circuits and the ASK
Envelope Shaping sections for details.
13 PAVOUT
Power Amplifier Power-Control Output. Controls the transmitted power. Connect to PA pullup
inductor. Bypass to ground with 680pF capacitor.
14 V
DD5
Supply Voltage Input. Bypass to ground with 0.01FF and 0.1FF capacitors.
16 AVDD
Analog Supply Voltage and Regulator Output. Bypass to GND with 0.1FF and 0.01FF capacitors
as close as possible to the pin.
17 XTAL2 Crystal Input 2. XTAL2 can be driven from an AC-coupled external reference.
18 XTAL1 Crystal Input 1. AC-couple to GND if XTAL2 is driven from an AC-coupled external reference.
19
CS_DEV
(SPI Mode/Manual Mode) Serial Peripheral Interface (SPI) Active-Low Chip-Select Input. FSK
frequency-deviation input (0 = low deviation, 1 = high deviation) in manual mode. Internally
pulled up.
20 SDI_PWR1
(SPI Mode/Manual Mode) SPI Data Input in SPI Mode. Power-control MSB input in manual mode.
Internally pulled down.
21 SCLK_PWR0
(SPI Mode/Manual Mode) SPI Clock Input in SPI Mode. Power-control LSB input in manual
mode. Internally pulled down.
22 ENABLE
Enable Digital Input. All internal circuits (except the PA in ASK mode) are enabled on the rising
edge of ENABLE. Internally pulled down.
23 DIN Transmit Data Digital Input. Internally pulled down.
— EP Exposed Pad. Solder evenly to the board’s ground plane for proper operation.