Datasheet

MAX703/MAX704
Low-Cost Microprocessor Supervisory
Circuits with Battery Backup
4 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1V
OUT
Supply Output for CMOS RAM. When V
CC
is above the reset threshold, V
OUT
connects to V
CC
through a p-
channel MOSFET switch. When V
CC
is below the reset threshold, the higher of V
CC
or V
BATT
is connected to V
OUT
.
2V
CC
+5V Supply Input
3 GND Ground
4 PFI
Power-Fail Comparator Input. When PFI is less than 1.25V, PFO goes low; otherwise PFO remains high. Connect
PFI to GND or V
CC
when not used.
5 PFO P ow er - Fai l C om p ar ator O utp ut. It g oes l ow and si nks cur r ent w hen P FI i s l ess than 1.25V ; other w i se P FO r em ai ns hi g h.
6 MR
Manual Reset Input. Generates a reset pulse when pulled below 0.8V. This active-low input is TTL/CMOS
compatible and can be shorted to ground with a switch. It has an internal 250µA pullup current. Leave floating
when not used.
7 RESET
Reset Output. Remains low while V
CC
is below the reset threshold (4.65V for the MAX703, 4.40V for the MAX704).
It remains low for 200ms after V
CC
rises above the reset threshold (Figure 2) or MR goes from low to high.
8V
BATT
Backup-Battery Input. When V
CC
falls below the reset threshold, V
BATT
is switched to V
OUT
if V
BATT
is 20mV
greater than V
CC
. When V
CC
rises 20mV above V
BATT
, V
CC
is switched to V
OUT
. The 40mV hysteresis prevents
repeated switching if V
CC
falls slowly.
BATTERY-SWITCHOVER
CIRCUITRY
GND
1.25V
MAX703
MAX704
RESET
GENERATOR
RESET
PFO
MR
V
OUT
V
BATT
V
CC
PFI
1.25V
Figure 1. Block Diagram
RESET
PFO*
V
BATT
= 3.0V
*PFO DEPENDS ON PFI EXCEPT IN BATTERY-BACKUP MODE, WHERE PFO IS LOW.
+5V
V
CC
V
OUT
+5V
+5V
0V
+5V
0V
0V
0V
V
RST
3.0V
t
RST
Figure 2. Timing Diagram