Datasheet
Layout Considerations
A properly designed PCB is an essential part of any RF/
microwave circuit. On high-frequency inputs and outputs,
use controlled-impedance lines and keep them as short
as possible to minimize losses and radiation. At high
frequencies, trace lengths that are on the order of λ/10 or
longer act as antennas.
Keeping the traces short also reduces parasitic induc-
tance. Generally, 1in of a PCB trace adds about 20nH of
parasitic inductance. The parasitic inductance can have
a dramatic effect on the effective inductance of a pas-
sive component. For example, a 0.5in trace connecting a
100nH inductor adds an extra 10nH of inductance or 10%.
To reduce the parasitic inductance, use wider traces and
a solid ground or power plane below the signal traces.
Also, use low-inductance connections to ground on all
GND pins, and place decoupling capacitors close to all
power-supply pins.
Control Interface Considerations
When operating the MAX7033 with a +4.5V to +5.5V sup-
ply voltage, the SHDN and AC pins can be driven by a
microcontroller with either 3V or 5V interface logic levels.
When operating the MAX7033 with a +3.0V to +3.6V sup-
ply, only 3V logic from the microcontroller is allowed.
28
C13
L1
C11
C1
C2
L2
L3
C3
C4
V
DD3
RF INPUT
V
DD3
V
DD
C12
X1
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MAX7033
DVDD
IF FILTER
COMPONENT VALUES
IN TABLE 1
**SEE THE MIXER SECTION. *SEE PHASE-LOCKED LOOP SECTION.
Y1
*
**
GND
IN OUT
DGND
MIXOUT
IRSEL
AGND
MIXIN2
MIXIN1
AVDD
LNAOUT
C9
C10
AGND
LNASRC
LNAIN
AVDD
XTAL1 XTAL2
TO/FROM µP
POWER-DOWN
DATA OUT
SHDN
PDOUT
DATAOUT
V
DD5
DSP
AC
DFFB
C8
R1
FROM P
R2
R3
C7
C6C5
OPP
DSN
DFO
IFIN2
IFIN1
XTALSEL
IF V
DD
IS
3.0V TO 3.6V
THEN V
DD3
IS
CONNECTED TO V
DD
CREATED BY LDO,
AVAILABLE AT AVDD
(PIN 2)
C15
C14
(SEE TABLE)
4.5V TO 5.5V
MAX7033 315MHz/433MHz ASK Superheterodyne
Receiver with AGC Lock
www.maximintegrated.com
Maxim Integrated
│
14
Typical Application Circuit