Datasheet

PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 CERDIP J16-3 21-0045 —
16 PDIP P16+1 21-0043 —
16 Wide SO W16+1 21-0042 90-0107
V
CC
V
CC
LL
IN
LL
IN
GND
GND
BATT ON
TEST RESET RESET V
BATT
V
OUT
RESET RESET
WDO WDO
LOW LINE
OSC IN OSC
SEL
PFI
PFO
LOW LINE
OSC IN OSC
SEL
PFI
PFO
WDI WDI
CE IN
CE OUT
MAX697 MAX696
0.084”
[2.13mm]
0.116”
[2.95mm]
0.084”
[2.13mm]
0.116”
[2.95mm]
MAX696/MAX697 Microprocessor Supervisory Circuits
www.maximintegrated.com
Maxim Integrated │ 15
Chip Topography
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.