Datasheet

MAX6968
8-Port, 5.5V Constant-Current LED Driver
8 _______________________________________________________________________________________
CLK is the serial-clock input, which shifts data at DIN
into the MAX6968 8-bit shift register on its rising edge.
LE is the load input of the MAX6968 latch that transfers
data from the MAX6968 8-bit shift register to its 8-bit
latch when LE is high (transparent latch), and latches
the data on the LE’s falling edge of LE (Figure 2).
The fourth input provides output-enable control of the
output drivers. OE is high to force outputs OUT0–OUT7
high impedance, without altering the contents of the
output latches, and low to enable outputs OUT0–OUT7
to follow the state of the output latches.
OE is independent of the operation of the serial inter-
face. Data can be shifted into the serial-interface shift
register and latched, regardless of the state of OE.
DOUT is the serial-data output, which shifts data out
from the MAX6968’s 8-bit shift register on the rising edge
of CLK. Data at DIN is propagated through the shift reg-
ister and appears at DOUT eight clock cycles later.
LE
OUT_
LE
OUT_
CLK
OUT_
CLK
OUT_
t
CRR
t
CRF
t
LRR
t
LRF
Figure 3. LE and CLK to OUT_ Timing
Table 1. 4-Wire Serial-Interface Truth Table
SHIFT-REGISTER
CONTENTS
LATCH CONTENTS OUTPUT CONTENTS
SERIAL
DATA
INPUT
DIN
CLOCK
INPUT
CLK
D
0
D
1
D
2
… D
n-1
D
n
LOAD
INPUT
LE
D
0
D
1
D
2
… D
n-1
D
n
BLANKING
INPUT
OE
D
0
D
1
D
2
… D
n-1
D
n
H
HR
1
R
2
… R
n-2
R
n-1
—
——————
—
— ————
—
L
LR
1
R
2
… R
n-2
R
n-1
—
——————
—
—————
—
X
R
0
R
1
R
2
… R
n-1
R
n
—
——————
—
—————
—
——
XXX… XX
H
R
0
R
1
R
2
— R
n-1
R
n
—
—————
—
——
P
1
P
2
P
3
… P
n-1
P
n
L
P
0
P
1
P
2
… P
n-1
P
n
L
P
0
P
1
P
2
… P
n-1
P
n
——
——————
—
XXX… XX
H
Hi-Z Hi-Z Hi-Z … Hi-Z
Hi-Z
L = Low-logic level
H = High-logic level
X = Don’t care
P = Present state
R = Previous state